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authorVivek Natarajan <vnatarajan@atheros.com>2011-01-27 14:45:07 +0530
committerJohn W. Linville <linville@tuxdriver.com>2011-01-28 15:44:28 -0500
commitb141581923ab4904052174e3b4eb17cc3ce8632c (patch)
tree7b6249510e86a8e72cc10c73ab8e6eeecb631917 /drivers/net/wireless/ath/ath9k/reg.h
parent74f7635930bb157b2e83d38a68177a2b28138ead (diff)
ath9k_hw: Add a function to read sqsum_dvc.
Add a function to observe the delta VC of BB_PLL. For a good chip, the sqsum_dvc is below 2000. Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/reg.h')
-rw-r--r--drivers/net/wireless/ath/ath9k/reg.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index 4df5659c6c1..264aea7919e 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -1129,6 +1129,12 @@ enum {
#define AR_RTC_PLL_CLKSEL 0x00000300
#define AR_RTC_PLL_CLKSEL_S 8
+#define PLL3 0x16188
+#define PLL3_DO_MEAS_MASK 0x40000000
+#define PLL4 0x1618c
+#define PLL4_MEAS_DONE 0x8
+#define SQSUM_DVC_MASK 0x007ffff8
+
#define AR_RTC_RESET \
((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0040) : 0x7040)
#define AR_RTC_RESET_EN (0x00000001)