ath5k: PHY code cleanup

 * Clean up initial rf buffer settings (new file rfbufer.h) and introduce a
   new way to access specific rf registers (will use it later)

 * Clean up initial rf gain settings by moving them on a new file (rfgain.h)
   so we can later work on gain optimization functions

 * Update initial rf buffer settings and initial rf gain settings from HALs.
   This breaks things for now because our current dumps come from pre-configured
   rf buffer (regdumps already had the needed values set from binary HAL).

 Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>

Signed-off-by: John W. Linville <linville@tuxdriver.com>

1 files changed, 38 insertions, 1133 deletions

diff --git a/drivers/net/wireless/ath5k/phy.c b/drivers/net/wireless/ath5k/phy.c
index 7ba18e09463..5021749a439 100644
--- a/drivers/net/wireless/ath5k/phy.c
+++ b/drivers/net/wireless/ath5k/phy.c
@@ -2,7 +2,7 @@
  * PHY functions
  *
  * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
- * Copyright (c) 2006-2007 Nick Kossifidis <mickflemm@gmail.com>
+ * Copyright (c) 2006-2009 Nick Kossifidis <mickflemm@gmail.com>
  * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com>
  *
  * Permission to use, copy, modify, and distribute this software for any
@@ -26,1084 +26,8 @@
 #include "ath5k.h"
 #include "reg.h"
 #include "base.h"
-
-/* Struct to hold initial RF register values (RF Banks) */
-struct ath5k_ini_rf {
-	u8	rf_bank;	/* check out ath5k_reg.h */
-	u16	rf_register;	/* register address */
-	u32	rf_value[5];	/* register value for different modes (above) */
-};
-
-/*
- * Mode-specific RF Gain table (64bytes) for RF5111/5112
- * (RF5110 only comes with AR5210 and only supports a/turbo a mode so initial
- * RF Gain values are included in AR5K_AR5210_INI)
- */
-struct ath5k_ini_rfgain {
-	u16	rfg_register;	/* RF Gain register address */
-	u32	rfg_value[2];	/* [freq (see below)] */
-};
-
-struct ath5k_gain_opt {
-	u32			go_default;
-	u32			go_steps_count;
-	const struct ath5k_gain_opt_step	go_step[AR5K_GAIN_STEP_COUNT];
-};
-
-/* RF5111 mode-specific init registers */
-static const struct ath5k_ini_rf rfregs_5111[] = {
-	{ 0, 0x989c,
-	/*    mode a/XR   mode aTurbo mode b      mode g      mode gTurbo */
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 0, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 0, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 0, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 0, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 0, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 0, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 0, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 0, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 0, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 0, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 0, 0x989c,
-	    { 0x00380000, 0x00380000, 0x00380000, 0x00380000, 0x00380000 } },
-	{ 0, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 0, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 0, 0x989c,
-	    { 0x00000000, 0x00000000, 0x000000c0, 0x00000080, 0x00000080 } },
-	{ 0, 0x989c,
-	    { 0x000400f9, 0x000400f9, 0x000400ff, 0x000400fd, 0x000400fd } },
-	{ 0, 0x98d4,
-	    { 0x00000000, 0x00000000, 0x00000004, 0x00000004, 0x00000004 } },
-	{ 1, 0x98d4,
-	    { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
-	{ 2, 0x98d4,
-	    { 0x00000010, 0x00000014, 0x00000010, 0x00000010, 0x00000014 } },
-	{ 3, 0x98d8,
-	    { 0x00601068, 0x00601068, 0x00601068, 0x00601068, 0x00601068 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
-	{ 6, 0x989c,
-	    { 0x04000000, 0x04000000, 0x04000000, 0x04000000, 0x04000000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x0a000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x003800c0, 0x00380080, 0x023800c0, 0x003800c0, 0x003800c0 } },
-	{ 6, 0x989c,
-	    { 0x00020006, 0x00020006, 0x00000006, 0x00020006, 0x00020006 } },
-	{ 6, 0x989c,
-	    { 0x00000089, 0x00000089, 0x00000089, 0x00000089, 0x00000089 } },
-	{ 6, 0x989c,
-	    { 0x000000a0, 0x000000a0, 0x000000a0, 0x000000a0, 0x000000a0 } },
-	{ 6, 0x989c,
-	    { 0x00040007, 0x00040007, 0x00040007, 0x00040007, 0x00040007 } },
-	{ 6, 0x98d4,
-	    { 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a } },
-	{ 7, 0x989c,
-	    { 0x00000040, 0x00000048, 0x00000040, 0x00000040, 0x00000040 } },
-	{ 7, 0x989c,
-	    { 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010 } },
-	{ 7, 0x989c,
-	    { 0x00000008, 0x00000008, 0x00000008, 0x00000008, 0x00000008 } },
-	{ 7, 0x989c,
-	    { 0x0000004f, 0x0000004f, 0x0000004f, 0x0000004f, 0x0000004f } },
-	{ 7, 0x989c,
-	    { 0x000000f1, 0x000000f1, 0x00000061, 0x000000f1, 0x000000f1 } },
-	{ 7, 0x989c,
-	    { 0x0000904f, 0x0000904f, 0x0000904c, 0x0000904f, 0x0000904f } },
-	{ 7, 0x989c,
-	    { 0x0000125a, 0x0000125a, 0x0000129a, 0x0000125a, 0x0000125a } },
-	{ 7, 0x98cc,
-	    { 0x0000000e, 0x0000000e, 0x0000000f, 0x0000000e, 0x0000000e } },
-};
-
-/* Initial RF Gain settings for RF5111 */
-static const struct ath5k_ini_rfgain rfgain_5111[] = {
-	/*			      5Ghz	2Ghz	*/
-	{ AR5K_RF_GAIN(0),	{ 0x000001a9, 0x00000000 } },
-	{ AR5K_RF_GAIN(1),	{ 0x000001e9, 0x00000040 } },
-	{ AR5K_RF_GAIN(2),	{ 0x00000029, 0x00000080 } },
-	{ AR5K_RF_GAIN(3),	{ 0x00000069, 0x00000150 } },
-	{ AR5K_RF_GAIN(4),	{ 0x00000199, 0x00000190 } },
-	{ AR5K_RF_GAIN(5),	{ 0x000001d9, 0x000001d0 } },
-	{ AR5K_RF_GAIN(6),	{ 0x00000019, 0x00000010 } },
-	{ AR5K_RF_GAIN(7),	{ 0x00000059, 0x00000044 } },
-	{ AR5K_RF_GAIN(8),	{ 0x00000099, 0x00000084 } },
-	{ AR5K_RF_GAIN(9),	{ 0x000001a5, 0x00000148 } },
-	{ AR5K_RF_GAIN(10),	{ 0x000001e5, 0x00000188 } },
-	{ AR5K_RF_GAIN(11),	{ 0x00000025, 0x000001c8 } },
-	{ AR5K_RF_GAIN(12),	{ 0x000001c8, 0x00000014 } },
-	{ AR5K_RF_GAIN(13),	{ 0x00000008, 0x00000042 } },
-	{ AR5K_RF_GAIN(14),	{ 0x00000048, 0x00000082 } },
-	{ AR5K_RF_GAIN(15),	{ 0x00000088, 0x00000178 } },
-	{ AR5K_RF_GAIN(16),	{ 0x00000198, 0x000001b8 } },
-	{ AR5K_RF_GAIN(17),	{ 0x000001d8, 0x000001f8 } },
-	{ AR5K_RF_GAIN(18),	{ 0x00000018, 0x00000012 } },
-	{ AR5K_RF_GAIN(19),	{ 0x00000058, 0x00000052 } },
-	{ AR5K_RF_GAIN(20),	{ 0x00000098, 0x00000092 } },
-	{ AR5K_RF_GAIN(21),	{ 0x000001a4, 0x0000017c } },
-	{ AR5K_RF_GAIN(22),	{ 0x000001e4, 0x000001bc } },
-	{ AR5K_RF_GAIN(23),	{ 0x00000024, 0x000001fc } },
-	{ AR5K_RF_GAIN(24),	{ 0x00000064, 0x0000000a } },
-	{ AR5K_RF_GAIN(25),	{ 0x000000a4, 0x0000004a } },
-	{ AR5K_RF_GAIN(26),	{ 0x000000e4, 0x0000008a } },
-	{ AR5K_RF_GAIN(27),	{ 0x0000010a, 0x0000015a } },
-	{ AR5K_RF_GAIN(28),	{ 0x0000014a, 0x0000019a } },
-	{ AR5K_RF_GAIN(29),	{ 0x0000018a, 0x000001da } },
-	{ AR5K_RF_GAIN(30),	{ 0x000001ca, 0x0000000e } },
-	{ AR5K_RF_GAIN(31),	{ 0x0000000a, 0x0000004e } },
-	{ AR5K_RF_GAIN(32),	{ 0x0000004a, 0x0000008e } },
-	{ AR5K_RF_GAIN(33),	{ 0x0000008a, 0x0000015e } },
-	{ AR5K_RF_GAIN(34),	{ 0x000001ba, 0x0000019e } },
-	{ AR5K_RF_GAIN(35),	{ 0x000001fa, 0x000001de } },
-	{ AR5K_RF_GAIN(36),	{ 0x0000003a, 0x00000009 } },
-	{ AR5K_RF_GAIN(37),	{ 0x0000007a, 0x00000049 } },
-	{ AR5K_RF_GAIN(38),	{ 0x00000186, 0x00000089 } },
-	{ AR5K_RF_GAIN(39),	{ 0x000001c6, 0x00000179 } },
-	{ AR5K_RF_GAIN(40),	{ 0x00000006, 0x000001b9 } },
-	{ AR5K_RF_GAIN(41),	{ 0x00000046, 0x000001f9 } },
-	{ AR5K_RF_GAIN(42),	{ 0x00000086, 0x00000039 } },
-	{ AR5K_RF_GAIN(43),	{ 0x000000c6, 0x00000079 } },
-	{ AR5K_RF_GAIN(44),	{ 0x000000c6, 0x000000b9 } },
-	{ AR5K_RF_GAIN(45),	{ 0x000000c6, 0x000001bd } },
-	{ AR5K_RF_GAIN(46),	{ 0x000000c6, 0x000001fd } },
-	{ AR5K_RF_GAIN(47),	{ 0x000000c6, 0x0000003d } },
-	{ AR5K_RF_GAIN(48),	{ 0x000000c6, 0x0000007d } },
-	{ AR5K_RF_GAIN(49),	{ 0x000000c6, 0x000000bd } },
-	{ AR5K_RF_GAIN(50),	{ 0x000000c6, 0x000000fd } },
-	{ AR5K_RF_GAIN(51),	{ 0x000000c6, 0x000000fd } },
-	{ AR5K_RF_GAIN(52),	{ 0x000000c6, 0x000000fd } },
-	{ AR5K_RF_GAIN(53),	{ 0x000000c6, 0x000000fd } },
-	{ AR5K_RF_GAIN(54),	{ 0x000000c6, 0x000000fd } },
-	{ AR5K_RF_GAIN(55),	{ 0x000000c6, 0x000000fd } },
-	{ AR5K_RF_GAIN(56),	{ 0x000000c6, 0x000000fd } },
-	{ AR5K_RF_GAIN(57),	{ 0x000000c6, 0x000000fd } },
-	{ AR5K_RF_GAIN(58),	{ 0x000000c6, 0x000000fd } },
-	{ AR5K_RF_GAIN(59),	{ 0x000000c6, 0x000000fd } },
-	{ AR5K_RF_GAIN(60),	{ 0x000000c6, 0x000000fd } },
-	{ AR5K_RF_GAIN(61),	{ 0x000000c6, 0x000000fd } },
-	{ AR5K_RF_GAIN(62),	{ 0x000000c6, 0x000000fd } },
-	{ AR5K_RF_GAIN(63),	{ 0x000000c6, 0x000000fd } },
-};
-
-static const struct ath5k_gain_opt rfgain_opt_5111 = {
-	4,
-	9,
-	{
-		{ { 4, 1, 1, 1 }, 6 },
-		{ { 4, 0, 1, 1 }, 4 },
-		{ { 3, 1, 1, 1 }, 3 },
-		{ { 4, 0, 0, 1 }, 1 },
-		{ { 4, 1, 1, 0 }, 0 },
-		{ { 4, 0, 1, 0 }, -2 },
-		{ { 3, 1, 1, 0 }, -3 },
-		{ { 4, 0, 0, 0 }, -4 },
-		{ { 2, 1, 1, 0 }, -6 }
-	}
-};
-
-/* RF5112 mode-specific init registers */
-static const struct ath5k_ini_rf rfregs_5112[] = {
-	{ 1, 0x98d4,
-	/*    mode a/XR   mode aTurbo mode b      mode g      mode gTurbo */
-	    { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
-	{ 2, 0x98d0,
-	    { 0x03060408, 0x03070408, 0x03060408, 0x03060408, 0x03070408 } },
-	{ 3, 0x98dc,
-	    { 0x00a0c0c0, 0x00a0c0c0, 0x00e0c0c0, 0x00e0c0c0, 0x00e0c0c0 } },
-	{ 6, 0x989c,
-	    { 0x00a00000, 0x00a00000, 0x00a00000, 0x00a00000, 0x00a00000 } },
-	{ 6, 0x989c,
-	    { 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00660000, 0x00660000, 0x00660000, 0x00660000, 0x00660000 } },
-	{ 6, 0x989c,
-	    { 0x00db0000, 0x00db0000, 0x00db0000, 0x00db0000, 0x00db0000 } },
-	{ 6, 0x989c,
-	    { 0x00f10000, 0x00f10000, 0x00f10000, 0x00f10000, 0x00f10000 } },
-	{ 6, 0x989c,
-	    { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } },
-	{ 6, 0x989c,
-	    { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } },
-	{ 6, 0x989c,
-	    { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } },
-	{ 6, 0x989c,
-	    { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
-	{ 6, 0x989c,
-	    { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
-	{ 6, 0x989c,
-	    { 0x008b0000, 0x008b0000, 0x008b0000, 0x008b0000, 0x008b0000 } },
-	{ 6, 0x989c,
-	    { 0x00600000, 0x00600000, 0x00600000, 0x00600000, 0x00600000 } },
-	{ 6, 0x989c,
-	    { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } },
-	{ 6, 0x989c,
-	    { 0x00840000, 0x00840000, 0x00840000, 0x00840000, 0x00840000 } },
-	{ 6, 0x989c,
-	    { 0x00640000, 0x00640000, 0x00640000, 0x00640000, 0x00640000 } },
-	{ 6, 0x989c,
-	    { 0x00200000, 0x00200000, 0x00200000, 0x00200000, 0x00200000 } },
-	{ 6, 0x989c,
-	    { 0x00240000, 0x00240000, 0x00240000, 0x00240000, 0x00240000 } },
-	{ 6, 0x989c,
-	    { 0x00250000, 0x00250000, 0x00250000, 0x00250000, 0x00250000 } },
-	{ 6, 0x989c,
-	    { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } },
-	{ 6, 0x989c,
-	    { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } },
-	{ 6, 0x989c,
-	    { 0x00510000, 0x00510000, 0x00510000, 0x00510000, 0x00510000 } },
-	{ 6, 0x989c,
-	    { 0x1c040000, 0x1c040000, 0x1c040000, 0x1c040000, 0x1c040000 } },
-	{ 6, 0x989c,
-	    { 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000 } },
-	{ 6, 0x989c,
-	    { 0x00a10000, 0x00a10000, 0x00a10000, 0x00a10000, 0x00a10000 } },
-	{ 6, 0x989c,
-	    { 0x00400000, 0x00400000, 0x00400000, 0x00400000, 0x00400000 } },
-	{ 6, 0x989c,
-	    { 0x03090000, 0x03090000, 0x03090000, 0x03090000, 0x03090000 } },
-	{ 6, 0x989c,
-	    { 0x06000000, 0x06000000, 0x06000000, 0x06000000, 0x06000000 } },
-	{ 6, 0x989c,
-	    { 0x000000b0, 0x000000b0, 0x000000a8, 0x000000a8, 0x000000a8 } },
-	{ 6, 0x989c,
-	    { 0x0000002e, 0x0000002e, 0x0000002e, 0x0000002e, 0x0000002e } },
-	{ 6, 0x989c,
-	    { 0x006c4a41, 0x006c4a41, 0x006c4af1, 0x006c4a61, 0x006c4a61 } },
-	{ 6, 0x989c,
-	    { 0x0050892a, 0x0050892a, 0x0050892b, 0x0050892b, 0x0050892b } },
-	{ 6, 0x989c,
-	    { 0x00842400, 0x00842400, 0x00842400, 0x00842400, 0x00842400 } },
-	{ 6, 0x989c,
-	    { 0x00c69200, 0x00c69200, 0x00c69200, 0x00c69200, 0x00c69200 } },
-	{ 6, 0x98d0,
-	    { 0x0002000c, 0x0002000c, 0x0002000c, 0x0002000c, 0x0002000c } },
-	{ 7, 0x989c,
-	    { 0x00000094, 0x00000094, 0x00000094, 0x00000094, 0x00000094 } },
-	{ 7, 0x989c,
-	    { 0x00000091, 0x00000091, 0x00000091, 0x00000091, 0x00000091 } },
-	{ 7, 0x989c,
-	    { 0x0000000a, 0x0000000a, 0x00000012, 0x00000012, 0x00000012 } },
-	{ 7, 0x989c,
-	    { 0x00000080, 0x00000080, 0x00000080, 0x00000080, 0x00000080 } },
-	{ 7, 0x989c,
-	    { 0x000000c1, 0x000000c1, 0x000000c1, 0x000000c1, 0x000000c1 } },
-	{ 7, 0x989c,
-	    { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } },
-	{ 7, 0x989c,
-	    { 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0 } },
-	{ 7, 0x989c,
-	    { 0x00000022, 0x00000022, 0x00000022, 0x00000022, 0x00000022 } },
-	{ 7, 0x989c,
-	    { 0x00000092, 0x00000092, 0x00000092, 0x00000092, 0x00000092 } },
-	{ 7, 0x989c,
-	    { 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4 } },
-	{ 7, 0x989c,
-	    { 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc } },
-	{ 7, 0x989c,
-	    { 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c } },
-	{ 7, 0x98c4,
-	    { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } },
-};
-
-/* RF5112A mode-specific init registers */
-static const struct ath5k_ini_rf rfregs_5112a[] = {
-	{ 1, 0x98d4,
-	/*    mode a/XR   mode aTurbo mode b      mode g      mode gTurbo */
-	    { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
-	{ 2, 0x98d0,
-	    { 0x03060408, 0x03070408, 0x03060408, 0x03060408, 0x03070408 } },
-	{ 3, 0x98dc,
-	    { 0x00a0c0c0, 0x00a0c0c0, 0x00e0c0c0, 0x00e0c0c0, 0x00e0c0c0 } },
-	{ 6, 0x989c,
-	    { 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00800000, 0x00800000, 0x00800000, 0x00800000, 0x00800000 } },
-	{ 6, 0x989c,
-	    { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
-	{ 6, 0x989c,
-	    { 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00180000, 0x00180000, 0x00180000, 0x00180000, 0x00180000 } },
-	{ 6, 0x989c,
-	    { 0x00600000, 0x00600000, 0x006e0000, 0x006e0000, 0x006e0000 } },
-	{ 6, 0x989c,
-	    { 0x00c70000, 0x00c70000, 0x00c70000, 0x00c70000, 0x00c70000 } },
-	{ 6, 0x989c,
-	    { 0x004b0000, 0x004b0000, 0x004b0000, 0x004b0000, 0x004b0000 } },
-	{ 6, 0x989c,
-	    { 0x04480000, 0x04480000, 0x04480000, 0x04480000, 0x04480000 } },
-	{ 6, 0x989c,
-	    { 0x00220000, 0x00220000, 0x00220000, 0x00220000, 0x00220000 } },
-	{ 6, 0x989c,
-	    { 0x00e40000, 0x00e40000, 0x00e40000, 0x00e40000, 0x00e40000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00fc0000, 0x00fc0000, 0x00fc0000, 0x00fc0000, 0x00fc0000 } },
-	{ 6, 0x989c,
-	    { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
-	{ 6, 0x989c,
-	    { 0x043f0000, 0x043f0000, 0x043f0000, 0x043f0000, 0x043f0000 } },
-	{ 6, 0x989c,
-	    { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } },
-	{ 6, 0x989c,
-	    { 0x00190000, 0x00190000, 0x00190000, 0x00190000, 0x00190000 } },
-	{ 6, 0x989c,
-	    { 0x00240000, 0x00240000, 0x00240000, 0x00240000, 0x00240000 } },
-	{ 6, 0x989c,
-	    { 0x00b40000, 0x00b40000, 0x00b40000, 0x00b40000, 0x00b40000 } },
-	{ 6, 0x989c,
-	    { 0x00990000, 0x00990000, 0x00990000, 0x00990000, 0x00990000 } },
-	{ 6, 0x989c,
-	    { 0x00500000, 0x00500000, 0x00500000, 0x00500000, 0x00500000 } },
-	{ 6, 0x989c,
-	    { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
-	{ 6, 0x989c,
-	    { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } },
-	{ 6, 0x989c,
-	    { 0xc0320000, 0xc0320000, 0xc0320000, 0xc0320000, 0xc0320000 } },
-	{ 6, 0x989c,
-	    { 0x01740000, 0x01740000, 0x01740000, 0x01740000, 0x01740000 } },
-	{ 6, 0x989c,
-	    { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } },
-	{ 6, 0x989c,
-	    { 0x86280000, 0x86280000, 0x86280000, 0x86280000, 0x86280000 } },
-	{ 6, 0x989c,
-	    { 0x31840000, 0x31840000, 0x31840000, 0x31840000, 0x31840000 } },
-	{ 6, 0x989c,
-	    { 0x00020080, 0x00020080, 0x00020080, 0x00020080, 0x00020080 } },
-	{ 6, 0x989c,
-	    { 0x00080009, 0x00080009, 0x00080009, 0x00080009, 0x00080009 } },
-	{ 6, 0x989c,
-	    { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x000000b2, 0x000000b2, 0x000000b2, 0x000000b2, 0x000000b2 } },
-	{ 6, 0x989c,
-	    { 0x00b02084, 0x00b02084, 0x00b02084, 0x00b02084, 0x00b02084 } },
-	{ 6, 0x989c,
-	    { 0x004125a4, 0x004125a4, 0x004125a4, 0x004125a4, 0x004125a4 } },
-	{ 6, 0x989c,
-	    { 0x00119220, 0x00119220, 0x00119220, 0x00119220, 0x00119220 } },
-	{ 6, 0x989c,
-	    { 0x001a4800, 0x001a4800, 0x001a4800, 0x001a4800, 0x001a4800 } },
-	{ 6, 0x98d8,
-	    { 0x000b0230, 0x000b0230, 0x000b0230, 0x000b0230, 0x000b0230 } },
-	{ 7, 0x989c,
-	    { 0x00000094, 0x00000094, 0x00000094, 0x00000094, 0x00000094 } },
-	{ 7, 0x989c,
-	    { 0x00000091, 0x00000091, 0x00000091, 0x00000091, 0x00000091 } },
-	{ 7, 0x989c,
-	    { 0x00000012, 0x00000012, 0x00000012, 0x00000012, 0x00000012 } },
-	{ 7, 0x989c,
-	    { 0x00000080, 0x00000080, 0x00000080, 0x00000080, 0x00000080 } },
-	{ 7, 0x989c,
-	    { 0x000000d9, 0x000000d9, 0x000000d9, 0x000000d9, 0x000000d9 } },
-	{ 7, 0x989c,
-	    { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } },
-	{ 7, 0x989c,
-	    { 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0 } },
-	{ 7, 0x989c,
-	    { 0x000000a2, 0x000000a2, 0x000000a2, 0x000000a2, 0x000000a2 } },
-	{ 7, 0x989c,
-	    { 0x00000052, 0x00000052, 0x00000052, 0x00000052, 0x00000052 } },
-	{ 7, 0x989c,
-	    { 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4 } },
-	{ 7, 0x989c,
-	    { 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc } },
-	{ 7, 0x989c,
-	    { 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c } },
-	{ 7, 0x98c4,
-	    { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } },
-};
-
-
-static const struct ath5k_ini_rf rfregs_2112a[] = {
-	{ 1, AR5K_RF_BUFFER_CONTROL_4,
-	/*	   mode b	mode g	  mode gTurbo */
-		{ 0x00000020, 0x00000020, 0x00000020 } },
-	{ 2, AR5K_RF_BUFFER_CONTROL_3,
-		{ 0x03060408, 0x03060408, 0x03070408 } },
-	{ 3, AR5K_RF_BUFFER_CONTROL_6,
-		{ 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x0a000000, 0x0a000000, 0x0a000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00800000, 0x00800000, 0x00800000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x002a0000, 0x002a0000, 0x002a0000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00010000, 0x00010000, 0x00010000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00180000, 0x00180000, 0x00180000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x006e0000, 0x006e0000, 0x006e0000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00c70000, 0x00c70000, 0x00c70000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x004b0000, 0x004b0000, 0x004b0000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x04480000, 0x04480000, 0x04480000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x002a0000, 0x002a0000, 0x002a0000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00e40000, 0x00e40000, 0x00e40000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00fc0000, 0x00fc0000, 0x00fc0000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x043f0000, 0x043f0000, 0x043f0000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x0c0c0000, 0x0c0c0000, 0x0c0c0000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x02190000, 0x02190000, 0x02190000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00240000, 0x00240000, 0x00240000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00b40000, 0x00b40000, 0x00b40000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00990000, 0x00990000, 0x00990000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00500000, 0x00500000, 0x00500000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x002a0000, 0x002a0000, 0x002a0000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00120000, 0x00120000, 0x00120000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0xc0320000, 0xc0320000, 0xc0320000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x01740000, 0x01740000, 0x01740000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00110000, 0x00110000, 0x00110000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x86280000, 0x86280000, 0x86280000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x31840000, 0x31840000, 0x31840000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00f20080, 0x00f20080, 0x00f20080 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00070019, 0x00070019, 0x00070019 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x000000b2, 0x000000b2, 0x000000b2 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00b02184, 0x00b02184, 0x00b02184 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x004125a4, 0x004125a4, 0x004125a4 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00119220, 0x00119220, 0x00119220 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x001a4800, 0x001a4800, 0x001a4800 } },
-	{ 6, AR5K_RF_BUFFER_CONTROL_5,
-		{ 0x000b0230, 0x000b0230, 0x000b0230 } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x00000094, 0x00000094, 0x00000094 } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x00000091, 0x00000091, 0x00000091 } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x00000012, 0x00000012, 0x00000012 } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x00000080, 0x00000080, 0x00000080 } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x000000d9, 0x000000d9, 0x000000d9 } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x00000060, 0x00000060, 0x00000060 } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x000000f0, 0x000000f0, 0x000000f0 } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x000000a2, 0x000000a2, 0x000000a2 } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x00000052, 0x00000052, 0x00000052 } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x000000d4, 0x000000d4, 0x000000d4 } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x000014cc, 0x000014cc, 0x000014cc } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x0000048c, 0x0000048c, 0x0000048c } },
-	{ 7, AR5K_RF_BUFFER_CONTROL_1,
-		{ 0x00000003, 0x00000003, 0x00000003 } },
-};
-
-/* RF5413/5414 mode-specific init registers */
-static const struct ath5k_ini_rf rfregs_5413[] = {
-	{ 1, 0x98d4,
-	/*    mode a/XR   mode aTurbo mode b      mode g      mode gTurbo */
-	    { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
-	{ 2, 0x98d0,
-	    { 0x00000008, 0x00000008, 0x00000008, 0x00000008, 0x00000008 } },
-	{ 3, 0x98dc,
-	    { 0x00a000c0, 0x00a000c0, 0x00e000c0, 0x00e000c0, 0x00e000c0 } },
-	{ 6, 0x989c,
-	    { 0x33000000, 0x33000000, 0x33000000, 0x33000000, 0x33000000 } },
-	{ 6, 0x989c,
-	    { 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x1f000000, 0x1f000000, 0x1f000000, 0x1f000000, 0x1f000000 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00b80000, 0x00b80000, 0x00b80000, 0x00b80000, 0x00b80000 } },
-	{ 6, 0x989c,
-	    { 0x00b70000, 0x00b70000, 0x00b70000, 0x00b70000, 0x00b70000 } },
-	{ 6, 0x989c,
-	    { 0x00840000, 0x00840000, 0x00840000, 0x00840000, 0x00840000 } },
-	{ 6, 0x989c,
-	    { 0x00980000, 0x00980000, 0x00980000, 0x00980000, 0x00980000 } },
-	{ 6, 0x989c,
-	    { 0x00c00000, 0x00c00000, 0x00c00000, 0x00c00000, 0x00c00000 } },
-	{ 6, 0x989c,
-	    { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
-	{ 6, 0x989c,
-	    { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
-	{ 6, 0x989c,
-	    { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
-	{ 6, 0x989c,
-	    { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
-	{ 6, 0x989c,
-	    { 0x00d70000, 0x00d70000, 0x00d70000, 0x00d70000, 0x00d70000 } },
-	{ 6, 0x989c,
-	    { 0x00610000, 0x00610000, 0x00610000, 0x00610000, 0x00610000 } },
-	{ 6, 0x989c,
-	    { 0x00fe0000, 0x00fe0000, 0x00fe0000, 0x00fe0000, 0x00fe0000 } },
-	{ 6, 0x989c,
-	    { 0x00de0000, 0x00de0000, 0x00de0000, 0x00de0000, 0x00de0000 } },
-	{ 6, 0x989c,
-	    { 0x007f0000, 0x007f0000, 0x007f0000, 0x007f0000, 0x007f0000 } },
-	{ 6, 0x989c,
-	    { 0x043d0000, 0x043d0000, 0x043d0000, 0x043d0000, 0x043d0000 } },
-	{ 6, 0x989c,
-	    { 0x00770000, 0x00770000, 0x00770000, 0x00770000, 0x00770000 } },
-	{ 6, 0x989c,
-	    { 0x00440000, 0x00440000, 0x00440000, 0x00440000, 0x00440000 } },
-	{ 6, 0x989c,
-	    { 0x00980000, 0x00980000, 0x00980000, 0x00980000, 0x00980000 } },
-	{ 6, 0x989c,
-	    { 0x00100080, 0x00100080, 0x00100080, 0x00100080, 0x00100080 } },
-	{ 6, 0x989c,
-	    { 0x0005c034, 0x0005c034, 0x0005c034, 0x0005c034, 0x0005c034 } },
-	{ 6, 0x989c,
-	    { 0x003100f0, 0x003100f0, 0x003100f0, 0x003100f0, 0x003100f0 } },
-	{ 6, 0x989c,
-	    { 0x000c011f, 0x000c011f, 0x000c011f, 0x000c011f, 0x000c011f } },
-	{ 6, 0x989c,
-	    { 0x00510040, 0x00510040, 0x005100a0, 0x005100a0, 0x005100a0 } },
-	{ 6, 0x989c,
-	    { 0x0050006a, 0x0050006a, 0x005000dd, 0x005000dd, 0x005000dd } },
-	{ 6, 0x989c,
-	    { 0x00000001, 0x00000001, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x00004044, 0x00004044, 0x00004044, 0x00004044, 0x00004044 } },
-	{ 6, 0x989c,
-	    { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, 0x989c,
-	    { 0x000060c0, 0x000060c0, 0x000060c0, 0x000060c0, 0x000060c0 } },
-	{ 6, 0x989c,
-	    { 0x00002c00, 0x00002c00, 0x00003600, 0x00003600, 0x00003600 } },
-	{ 6, 0x98c8,
-	    { 0x00000403, 0x00000403, 0x00040403, 0x00040403, 0x00040403 } },
-	{ 7, 0x989c,
-	    { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
-	{ 7, 0x989c,
-	    { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
-	{ 7, 0x98cc,
-	    { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
-};
-
-/* RF2413/2414 mode-specific init registers */
-static const struct ath5k_ini_rf rfregs_2413[] = {
-	{ 1, AR5K_RF_BUFFER_CONTROL_4,
-	/* 	   mode b      mode g     mode gTurbo */
-		{ 0x00000020, 0x00000020, 0x00000020 } },
-	{ 2, AR5K_RF_BUFFER_CONTROL_3,
-		{ 0x02001408, 0x02001408, 0x02001408 } },
-	{ 3, AR5K_RF_BUFFER_CONTROL_6,
-		{ 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0xf0000000, 0xf0000000, 0xf0000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x03000000, 0x03000000, 0x03000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x40400000, 0x40400000, 0x40400000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x65050000, 0x65050000, 0x65050000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00420000, 0x00420000, 0x00420000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00b50000, 0x00b50000, 0x00b50000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00030000, 0x00030000, 0x00030000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00f70000, 0x00f70000, 0x00f70000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x009d0000, 0x009d0000, 0x009d0000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00220000, 0x00220000, 0x00220000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x04220000, 0x04220000, 0x04220000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00230018, 0x00230018, 0x00230018 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00280050, 0x00280050, 0x00280050 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x005000c3, 0x005000c3, 0x005000c3 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x0004007f, 0x0004007f, 0x0004007f } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000458, 0x00000458, 0x00000458 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x0000c000, 0x0000c000, 0x0000c000 } },
-	{ 6, AR5K_RF_BUFFER_CONTROL_5,
-		{ 0x00400230, 0x00400230, 0x00400230 } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x00006400, 0x00006400, 0x00006400 } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x00000800, 0x00000800, 0x00000800 } },
-	{ 7, AR5K_RF_BUFFER_CONTROL_2,
-		{ 0x0000000e, 0x0000000e, 0x0000000e } },
-};
-
-/* RF2425 mode-specific init registers */
-static const struct ath5k_ini_rf rfregs_2425[] = {
-	{ 1, AR5K_RF_BUFFER_CONTROL_4,
-	/* 	   mode g     mode gTurbo */
-		{ 0x00000020, 0x00000020 } },
-	{ 2, AR5K_RF_BUFFER_CONTROL_3,
-		{ 0x02001408, 0x02001408 } },
-	{ 3, AR5K_RF_BUFFER_CONTROL_6,
-		{ 0x00e020c0, 0x00e020c0 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x10000000, 0x10000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x002a0000, 0x002a0000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00100000, 0x00100000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00020000, 0x00020000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00730000, 0x00730000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00f80000, 0x00f80000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00e70000, 0x00e70000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00140000, 0x00140000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00910040, 0x00910040 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x0007001a, 0x0007001a } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00410000, 0x00410000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00810060, 0x00810060 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00020803, 0x00020803 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00000000, 0x00000000 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00001660, 0x00001660 } },
-	{ 6, AR5K_RF_BUFFER,
-		{ 0x00001688, 0x00001688 } },
-	{ 6, AR5K_RF_BUFFER_CONTROL_1,
-		{ 0x00000001, 0x00000001 } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x00006400, 0x00006400 } },
-	{ 7, AR5K_RF_BUFFER,
-		{ 0x00000800, 0x00000800 } },
-	{ 7, AR5K_RF_BUFFER_CONTROL_2,
-		{ 0x0000000e, 0x0000000e } },
-};
-
-/* Initial RF Gain settings for RF5112 */
-static const struct ath5k_ini_rfgain rfgain_5112[] = {
-	/*			      5Ghz	2Ghz	*/
-	{ AR5K_RF_GAIN(0),	{ 0x00000007, 0x00000007 } },
-	{ AR5K_RF_GAIN(1),	{ 0x00000047, 0x00000047 } },
-	{ AR5K_RF_GAIN(2),	{ 0x00000087, 0x00000087 } },
-	{ AR5K_RF_GAIN(3),	{ 0x000001a0, 0x000001a0 } },
-	{ AR5K_RF_GAIN(4),	{ 0x000001e0, 0x000001e0 } },
-	{ AR5K_RF_GAIN(5),	{ 0x00000020, 0x00000020 } },
-	{ AR5K_RF_GAIN(6),	{ 0x00000060, 0x00000060 } },
-	{ AR5K_RF_GAIN(7),	{ 0x000001a1, 0x000001a1 } },
-	{ AR5K_RF_GAIN(8),	{ 0x000001e1, 0x000001e1 } },
-	{ AR5K_RF_GAIN(9),	{ 0x00000021, 0x00000021 } },
-	{ AR5K_RF_GAIN(10),	{ 0x00000061, 0x00000061 } },
-	{ AR5K_RF_GAIN(11),	{ 0x00000162, 0x00000162 } },
-	{ AR5K_RF_GAIN(12),	{ 0x000001a2, 0x000001a2 } },
-	{ AR5K_RF_GAIN(13),	{ 0x000001e2, 0x000001e2 } },
-	{ AR5K_RF_GAIN(14),	{ 0x00000022, 0x00000022 } },
-	{ AR5K_RF_GAIN(15),	{ 0x00000062, 0x00000062 } },
-	{ AR5K_RF_GAIN(16),	{ 0x00000163, 0x00000163 } },
-	{ AR5K_RF_GAIN(17),	{ 0x000001a3, 0x000001a3 } },
-	{ AR5K_RF_GAIN(18),	{ 0x000001e3, 0x000001e3 } },
-	{ AR5K_RF_GAIN(19),	{ 0x00000023, 0x00000023 } },
-	{ AR5K_RF_GAIN(20),	{ 0x00000063, 0x00000063 } },
-	{ AR5K_RF_GAIN(21),	{ 0x00000184, 0x00000184 } },
-	{ AR5K_RF_GAIN(22),	{ 0x000001c4, 0x000001c4 } },
-	{ AR5K_RF_GAIN(23),	{ 0x00000004, 0x00000004 } },
-	{ AR5K_RF_GAIN(24),	{ 0x000001ea, 0x0000000b } },
-	{ AR5K_RF_GAIN(25),	{ 0x0000002a, 0x0000004b } },
-	{ AR5K_RF_GAIN(26),	{ 0x0000006a, 0x0000008b } },
-	{ AR5K_RF_GAIN(27),	{ 0x000000aa, 0x000001ac } },
-	{ AR5K_RF_GAIN(28),	{ 0x000001ab, 0x000001ec } },
-	{ AR5K_RF_GAIN(29),	{ 0x000001eb, 0x0000002c } },
-	{ AR5K_RF_GAIN(30),	{ 0x0000002b, 0x00000012 } },
-	{ AR5K_RF_GAIN(31),	{ 0x0000006b, 0x00000052 } },
-	{ AR5K_RF_GAIN(32),	{ 0x000000ab, 0x00000092 } },
-	{ AR5K_RF_GAIN(33),	{ 0x000001ac, 0x00000193 } },
-	{ AR5K_RF_GAIN(34),	{ 0x000001ec, 0x000001d3 } },
-	{ AR5K_RF_GAIN(35),	{ 0x0000002c, 0x00000013 } },
-	{ AR5K_RF_GAIN(36),	{ 0x0000003a, 0x00000053 } },
-	{ AR5K_RF_GAIN(37),	{ 0x0000007a, 0x00000093 } },
-	{ AR5K_RF_GAIN(38),	{ 0x000000ba, 0x00000194 } },
-	{ AR5K_RF_GAIN(39),	{ 0x000001bb, 0x000001d4 } },
-	{ AR5K_RF_GAIN(40),	{ 0x000001fb, 0x00000014 } },
-	{ AR5K_RF_GAIN(41),	{ 0x0000003b, 0x0000003a } },
-	{ AR5K_RF_GAIN(42),	{ 0x0000007b, 0x0000007a } },
-	{ AR5K_RF_GAIN(43),	{ 0x000000bb, 0x000000ba } },
-	{ AR5K_RF_GAIN(44),	{ 0x000001bc, 0x000001bb } },
-	{ AR5K_RF_GAIN(45),	{ 0x000001fc, 0x000001fb } },
-	{ AR5K_RF_GAIN(46),	{ 0x0000003c, 0x0000003b } },
-	{ AR5K_RF_GAIN(47),	{ 0x0000007c, 0x0000007b } },
-	{ AR5K_RF_GAIN(48),	{ 0x000000bc, 0x000000bb } },
-	{ AR5K_RF_GAIN(49),	{ 0x000000fc, 0x000001bc } },
-	{ AR5K_RF_GAIN(50),	{ 0x000000fc, 0x000001fc } },
-	{ AR5K_RF_GAIN(51),	{ 0x000000fc, 0x0000003c } },
-	{ AR5K_RF_GAIN(52),	{ 0x000000fc, 0x0000007c } },
-	{ AR5K_RF_GAIN(53),	{ 0x000000fc, 0x000000bc } },
-	{ AR5K_RF_GAIN(54),	{ 0x000000fc, 0x000000fc } },
-	{ AR5K_RF_GAIN(55),	{ 0x000000fc, 0x000000fc } },
-	{ AR5K_RF_GAIN(56),	{ 0x000000fc, 0x000000fc } },
-	{ AR5K_RF_GAIN(57),	{ 0x000000fc, 0x000000fc } },
-	{ AR5K_RF_GAIN(58),	{ 0x000000fc, 0x000000fc } },
-	{ AR5K_RF_GAIN(59),	{ 0x000000fc, 0x000000fc } },
-	{ AR5K_RF_GAIN(60),	{ 0x000000fc, 0x000000fc } },
-	{ AR5K_RF_GAIN(61),	{ 0x000000fc, 0x000000fc } },
-	{ AR5K_RF_GAIN(62),	{ 0x000000fc, 0x000000fc } },
-	{ AR5K_RF_GAIN(63),	{ 0x000000fc, 0x000000fc } },
-};
-
-/* Initial RF Gain settings for RF5413 */
-static const struct ath5k_ini_rfgain rfgain_5413[] = {
-	/*			      5Ghz	2Ghz	*/
-	{ AR5K_RF_GAIN(0),	{ 0x00000000, 0x00000000 } },
-	{ AR5K_RF_GAIN(1),	{ 0x00000040, 0x00000040 } },
-	{ AR5K_RF_GAIN(2),	{ 0x00000080, 0x00000080 } },
-	{ AR5K_RF_GAIN(3),	{ 0x000001a1, 0x00000161 } },
-	{ AR5K_RF_GAIN(4),	{ 0x000001e1, 0x000001a1 } },
-	{ AR5K_RF_GAIN(5),	{ 0x00000021, 0x000001e1 } },
-	{ AR5K_RF_GAIN(6),	{ 0x00000061, 0x00000021 } },
-	{ AR5K_RF_GAIN(7),	{ 0x00000188, 0x00000061 } },
-	{ AR5K_RF_GAIN(8),	{ 0x000001c8, 0x00000188 } },
-	{ AR5K_RF_GAIN(9),	{ 0x00000008, 0x000001c8 } },
-	{ AR5K_RF_GAIN(10),	{ 0x00000048, 0x00000008 } },
-	{ AR5K_RF_GAIN(11),	{ 0x00000088, 0x00000048 } },
-	{ AR5K_RF_GAIN(12),	{ 0x000001a9, 0x00000088 } },
-	{ AR5K_RF_GAIN(13),	{ 0x000001e9, 0x00000169 } },
-	{ AR5K_RF_GAIN(14),	{ 0x00000029, 0x000001a9 } },
-	{ AR5K_RF_GAIN(15),	{ 0x00000069, 0x000001e9 } },
-	{ AR5K_RF_GAIN(16),	{ 0x000001d0, 0x00000029 } },
-	{ AR5K_RF_GAIN(17),	{ 0x00000010, 0x00000069 } },
-	{ AR5K_RF_GAIN(18),	{ 0x00000050, 0x00000190 } },
-	{ AR5K_RF_GAIN(19),	{ 0x00000090, 0x000001d0 } },
-	{ AR5K_RF_GAIN(20),	{ 0x000001b1, 0x00000010 } },
-	{ AR5K_RF_GAIN(21),	{ 0x000001f1, 0x00000050 } },
-	{ AR5K_RF_GAIN(22),	{ 0x00000031, 0x00000090 } },
-	{ AR5K_RF_GAIN(23),	{ 0x00000071, 0x00000171 } },
-	{ AR5K_RF_GAIN(24),	{ 0x000001b8, 0x000001b1 } },
-	{ AR5K_RF_GAIN(25),	{ 0x000001f8, 0x000001f1 } },
-	{ AR5K_RF_GAIN(26),	{ 0x00000038, 0x00000031 } },
-	{ AR5K_RF_GAIN(27),	{ 0x00000078, 0x00000071 } },
-	{ AR5K_RF_GAIN(28),	{ 0x00000199, 0x00000198 } },
-	{ AR5K_RF_GAIN(29),	{ 0x000001d9, 0x000001d8 } },
-	{ AR5K_RF_GAIN(30),	{ 0x00000019, 0x00000018 } },
-	{ AR5K_RF_GAIN(31),	{ 0x00000059, 0x00000058 } },
-	{ AR5K_RF_GAIN(32),	{ 0x00000099, 0x00000098 } },
-	{ AR5K_RF_GAIN(33),	{ 0x000000d9, 0x00000179 } },
-	{ AR5K_RF_GAIN(34),	{ 0x000000f9, 0x000001b9 } },
-	{ AR5K_RF_GAIN(35),	{ 0x000000f9, 0x000001f9 } },
-	{ AR5K_RF_GAIN(36),	{ 0x000000f9, 0x00000039 } },
-	{ AR5K_RF_GAIN(37),	{ 0x000000f9, 0x00000079 } },
-	{ AR5K_RF_GAIN(38),	{ 0x000000f9, 0x000000b9 } },
-	{ AR5K_RF_GAIN(39),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(40),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(41),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(42),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(43),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(44),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(45),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(46),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(47),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(48),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(49),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(50),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(51),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(52),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(53),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(54),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(55),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(56),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(57),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(58),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(59),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(60),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(61),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(62),	{ 0x000000f9, 0x000000f9 } },
-	{ AR5K_RF_GAIN(63),	{ 0x000000f9, 0x000000f9 } },
-};
-
-/* Initial RF Gain settings for RF2413 */
-static const struct ath5k_ini_rfgain rfgain_2413[] = {
-	{ AR5K_RF_GAIN(0), { 0x00000000 } },
-	{ AR5K_RF_GAIN(1), { 0x00000040 } },
-	{ AR5K_RF_GAIN(2), { 0x00000080 } },
-	{ AR5K_RF_GAIN(3), { 0x00000181 } },
-	{ AR5K_RF_GAIN(4), { 0x000001c1 } },
-	{ AR5K_RF_GAIN(5), { 0x00000001 } },
-	{ AR5K_RF_GAIN(6), { 0x00000041 } },
-	{ AR5K_RF_GAIN(7), { 0x00000081 } },
-	{ AR5K_RF_GAIN(8), { 0x00000168 } },
-	{ AR5K_RF_GAIN(9), { 0x000001a8 } },
-	{ AR5K_RF_GAIN(10), { 0x000001e8 } },
-	{ AR5K_RF_GAIN(11), { 0x00000028 } },
-	{ AR5K_RF_GAIN(12), { 0x00000068 } },
-	{ AR5K_RF_GAIN(13), { 0x00000189 } },
-	{ AR5K_RF_GAIN(14), { 0x000001c9 } },
-	{ AR5K_RF_GAIN(15), { 0x00000009 } },
-	{ AR5K_RF_GAIN(16), { 0x00000049 } },
-	{ AR5K_RF_GAIN(17), { 0x00000089 } },
-	{ AR5K_RF_GAIN(18), { 0x00000190 } },
-	{ AR5K_RF_GAIN(19), { 0x000001d0 } },
-	{ AR5K_RF_GAIN(20), { 0x00000010 } },
-	{ AR5K_RF_GAIN(21), { 0x00000050 } },
-	{ AR5K_RF_GAIN(22), { 0x00000090 } },
-	{ AR5K_RF_GAIN(23), { 0x00000191 } },
-	{ AR5K_RF_GAIN(24), { 0x000001d1 } },
-	{ AR5K_RF_GAIN(25), { 0x00000011 } },
-	{ AR5K_RF_GAIN(26), { 0x00000051 } },
-	{ AR5K_RF_GAIN(27), { 0x00000091 } },
-	{ AR5K_RF_GAIN(28), { 0x00000178 } },
-	{ AR5K_RF_GAIN(29), { 0x000001b8 } },
-	{ AR5K_RF_GAIN(30), { 0x000001f8 } },
-	{ AR5K_RF_GAIN(31), { 0x00000038 } },
-	{ AR5K_RF_GAIN(32), { 0x00000078 } },
-	{ AR5K_RF_GAIN(33), { 0x00000199 } },
-	{ AR5K_RF_GAIN(34), { 0x000001d9 } },
-	{ AR5K_RF_GAIN(35), { 0x00000019 } },
-	{ AR5K_RF_GAIN(36), { 0x00000059 } },
-	{ AR5K_RF_GAIN(37), { 0x00000099 } },
-	{ AR5K_RF_GAIN(38), { 0x000000d9 } },
-	{ AR5K_RF_GAIN(39), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(40), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(41), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(42), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(43), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(44), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(45), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(46), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(47), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(48), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(49), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(50), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(51), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(52), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(53), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(54), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(55), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(56), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(57), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(58), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(59), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(60), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(61), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(62), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(63), { 0x000000f9 } },
-};
-
-/* Initial RF Gain settings for RF2425 */
-static const struct ath5k_ini_rfgain rfgain_2425[] = {
-	{ AR5K_RF_GAIN(0), { 0x00000000 } },
-	{ AR5K_RF_GAIN(1), { 0x00000040 } },
-	{ AR5K_RF_GAIN(2), { 0x00000080 } },
-	{ AR5K_RF_GAIN(3), { 0x00000181 } },
-	{ AR5K_RF_GAIN(4), { 0x000001c1 } },
-	{ AR5K_RF_GAIN(5), { 0x00000001 } },
-	{ AR5K_RF_GAIN(6), { 0x00000041 } },
-	{ AR5K_RF_GAIN(7), { 0x00000081 } },
-	{ AR5K_RF_GAIN(8), { 0x00000188 } },
-	{ AR5K_RF_GAIN(9), { 0x000001c8 } },
-	{ AR5K_RF_GAIN(10), { 0x00000008 } },
-	{ AR5K_RF_GAIN(11), { 0x00000048 } },
-	{ AR5K_RF_GAIN(12), { 0x00000088 } },
-	{ AR5K_RF_GAIN(13), { 0x00000189 } },
-	{ AR5K_RF_GAIN(14), { 0x000001c9 } },
-	{ AR5K_RF_GAIN(15), { 0x00000009 } },
-	{ AR5K_RF_GAIN(16), { 0x00000049 } },
-	{ AR5K_RF_GAIN(17), { 0x00000089 } },
-	{ AR5K_RF_GAIN(18), { 0x000001b0 } },
-	{ AR5K_RF_GAIN(19), { 0x000001f0 } },
-	{ AR5K_RF_GAIN(20), { 0x00000030 } },
-	{ AR5K_RF_GAIN(21), { 0x00000070 } },
-	{ AR5K_RF_GAIN(22), { 0x00000171 } },
-	{ AR5K_RF_GAIN(23), { 0x000001b1 } },
-	{ AR5K_RF_GAIN(24), { 0x000001f1 } },
-	{ AR5K_RF_GAIN(25), { 0x00000031 } },
-	{ AR5K_RF_GAIN(26), { 0x00000071 } },
-	{ AR5K_RF_GAIN(27), { 0x000001b8 } },
-	{ AR5K_RF_GAIN(28), { 0x000001f8 } },
-	{ AR5K_RF_GAIN(29), { 0x00000038 } },
-	{ AR5K_RF_GAIN(30), { 0x00000078 } },
-	{ AR5K_RF_GAIN(31), { 0x000000b8 } },
-	{ AR5K_RF_GAIN(32), { 0x000001b9 } },
-	{ AR5K_RF_GAIN(33), { 0x000001f9 } },
-	{ AR5K_RF_GAIN(34), { 0x00000039 } },
-	{ AR5K_RF_GAIN(35), { 0x00000079 } },
-	{ AR5K_RF_GAIN(36), { 0x000000b9 } },
-	{ AR5K_RF_GAIN(37), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(38), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(39), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(40), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(41), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(42), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(43), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(44), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(45), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(46), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(47), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(48), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(49), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(50), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(51), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(52), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(53), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(54), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(55), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(56), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(57), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(58), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(59), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(60), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(61), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(62), { 0x000000f9 } },
-	{ AR5K_RF_GAIN(63), { 0x000000f9 } },
-};
-
-static const struct ath5k_gain_opt rfgain_opt_5112 = {
-	1,
-	8,
-	{
-		{ { 3, 0, 0, 0, 0, 0, 0 }, 6 },
-		{ { 2, 0, 0, 0, 0, 0, 0 }, 0 },
-		{ { 1, 0, 0, 0, 0, 0, 0 }, -3 },
-		{ { 0, 0, 0, 0, 0, 0, 0 }, -6 },
-		{ { 0, 1, 1, 0, 0, 0, 0 }, -8 },
-		{ { 0, 1, 1, 0, 1, 1, 0 }, -10 },
-		{ { 0, 1, 0, 1, 1, 1, 0 }, -13 },
-		{ { 0, 1, 0, 1, 1, 0, 1 }, -16 },
-	}
-};
+#include "rfbuffer.h"
+#include "rfgain.h"
 
 /*
  * Used to modify RF Banks before writing them to AR5K_RF_BUFFER
@@ -1297,7 +221,7 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah,
 {
 	struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
 	u32 *rf;
-	const unsigned int rf_size = ARRAY_SIZE(rfregs_5111);
+	const unsigned int rf_size = ARRAY_SIZE(rfb_5111);
 	unsigned int i;
 	int obdb = -1, bank = -1;
 	u32 ee_mode;
@@ -1308,17 +232,17 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah,
 
 	/* Copy values to modify them */
 	for (i = 0; i < rf_size; i++) {
-		if (rfregs_5111[i].rf_bank >= AR5K_RF5111_INI_RF_MAX_BANKS) {
+		if (rfb_5111[i].rfb_bank >= AR5K_RF5111_INI_RF_MAX_BANKS) {
 			ATH5K_ERR(ah->ah_sc, "invalid bank\n");
 			return -EINVAL;
 		}
 
-		if (bank != rfregs_5111[i].rf_bank) {
-			bank = rfregs_5111[i].rf_bank;
+		if (bank != rfb_5111[i].rfb_bank) {
+			bank = rfb_5111[i].rfb_bank;
 			ah->ah_offset[bank] = i;
 		}
 
-		rf[i] = rfregs_5111[i].rf_value[mode];
+		rf[i] = rfb_5111[i].rfb_mode_data[mode];
 	}
 
 	/* Modify bank 0 */
@@ -1384,7 +308,7 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah,
 	/* Write RF values */
 	for (i = 0; i < rf_size; i++) {
 		AR5K_REG_WAIT(i);
-		ath5k_hw_reg_write(ah, rf[i], rfregs_5111[i].rf_register);
+		ath5k_hw_reg_write(ah, rf[i], rfb_5111[i].rfb_ctrl_register);
 	}
 
 	return 0;
@@ -1396,7 +320,7 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah,
 static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah,
 		struct ieee80211_channel *channel, unsigned int mode)
 {
-	const struct ath5k_ini_rf *rf_ini;
+	const struct ath5k_ini_rfbuffer *rf_ini;
 	struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
 	u32 *rf;
 	unsigned int rf_size, i;
@@ -1407,37 +331,27 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah,
 
 	rf = ah->ah_rf_banks;
 
-	if (ah->ah_radio_5ghz_revision >= AR5K_SREV_RAD_2112A
-		&& !test_bit(AR5K_MODE_11A, ah->ah_capabilities.cap_mode)) {
-		rf_ini = rfregs_2112a;
-		rf_size = ARRAY_SIZE(rfregs_5112a);
-		if (mode < 2) {
-			ATH5K_ERR(ah->ah_sc, "invalid channel mode: %i\n",
-				  mode);
-			return -EINVAL;
-		}
-		mode = mode - 2; /*no a/turboa modes for 2112*/
-	} else if (ah->ah_radio_5ghz_revision >= AR5K_SREV_RAD_5112A) {
-		rf_ini = rfregs_5112a;
-		rf_size = ARRAY_SIZE(rfregs_5112a);
+	if (ah->ah_radio_5ghz_revision >= AR5K_SREV_RAD_5112A) {
+		rf_ini = rfb_5112a;
+		rf_size = ARRAY_SIZE(rfb_5112a);
 	} else {
-		rf_ini = rfregs_5112;
-		rf_size = ARRAY_SIZE(rfregs_5112);
+		rf_ini = rfb_5112;
+		rf_size = ARRAY_SIZE(rfb_5112);
 	}
 
 	/* Copy values to modify them */
 	for (i = 0; i < rf_size; i++) {
-		if (rf_ini[i].rf_bank >= AR5K_RF5112_INI_RF_MAX_BANKS) {
+		if (rf_ini[i].rfb_bank >= AR5K_RF5112_INI_RF_MAX_BANKS) {
 			ATH5K_ERR(ah->ah_sc, "invalid bank\n");
 			return -EINVAL;
 		}
 
-		if (bank != rf_ini[i].rf_bank) {
-			bank = rf_ini[i].rf_bank;
+		if (bank != rf_ini[i].rfb_bank) {
+			bank = rf_ini[i].rfb_bank;
 			ah->ah_offset[bank] = i;
 		}
 
-		rf[i] = rf_ini[i].rf_value[mode];
+		rf[i] = rf_ini[i].rfb_mode_data[mode];
 	}
 
 	/* Modify bank 6 */
@@ -1491,7 +405,7 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah,
 
 	/* Write RF values */
 	for (i = 0; i < rf_size; i++)
-		ath5k_hw_reg_write(ah, rf[i], rf_ini[i].rf_register);
+		ath5k_hw_reg_write(ah, rf[i], rf_ini[i].rfb_ctrl_register);
 
 	return 0;
 }
@@ -1503,7 +417,7 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah,
 static int ath5k_hw_rf5413_rfregs(struct ath5k_hw *ah,
 		struct ieee80211_channel *channel, unsigned int mode)
 {
-	const struct ath5k_ini_rf *rf_ini;
+	const struct ath5k_ini_rfbuffer *rf_ini;
 	u32 *rf;
 	unsigned int rf_size, i;
 	int bank = -1;
@@ -1514,12 +428,12 @@ static int ath5k_hw_rf5413_rfregs(struct ath5k_hw *ah,
 
 	switch (ah->ah_radio) {
 	case AR5K_RF5413:
-		rf_ini = rfregs_5413;
-		rf_size = ARRAY_SIZE(rfregs_5413);
+		rf_ini = rfb_5413;
+		rf_size = ARRAY_SIZE(rfb_5413);
 		break;
 	case AR5K_RF2413:
-		rf_ini = rfregs_2413;
-		rf_size = ARRAY_SIZE(rfregs_2413);
+		rf_ini = rfb_2413;
+		rf_size = ARRAY_SIZE(rfb_2413);
 
 		if (mode < 2) {
 			ATH5K_ERR(ah->ah_sc,
@@ -1527,11 +441,10 @@ static int ath5k_hw_rf5413_rfregs(struct ath5k_hw *ah,
 			return -EINVAL;
 		}
 
-		mode = mode - 2;
 		break;
 	case AR5K_RF2425:
-		rf_ini = rfregs_2425;
-		rf_size = ARRAY_SIZE(rfregs_2425);
+		rf_ini = rfb_2425;
+		rf_size = ARRAY_SIZE(rfb_2425);
 
 		if (mode < 2) {
 			ATH5K_ERR(ah->ah_sc,
@@ -1539,12 +452,6 @@ static int ath5k_hw_rf5413_rfregs(struct ath5k_hw *ah,
 			return -EINVAL;
 		}
 
-		/* Map b to g */
-		if (mode == 2)
-			mode = 0;
-		else
-			mode = mode - 3;
-
 		break;
 	default:
 		return -EINVAL;
@@ -1552,17 +459,17 @@ static int ath5k_hw_rf5413_rfregs(struct ath5k_hw *ah,
 
 	/* Copy values to modify them */
 	for (i = 0; i < rf_size; i++) {
-		if (rf_ini[i].rf_bank >= AR5K_RF5112_INI_RF_MAX_BANKS) {
+		if (rf_ini[i].rfb_bank >= AR5K_RF5112_INI_RF_MAX_BANKS) {
 			ATH5K_ERR(ah->ah_sc, "invalid bank\n");
 			return -EINVAL;
 		}
 
-		if (bank != rf_ini[i].rf_bank) {
-			bank = rf_ini[i].rf_bank;
+		if (bank != rf_ini[i].rfb_bank) {
+			bank = rf_ini[i].rfb_bank;
 			ah->ah_offset[bank] = i;
 		}
 
-		rf[i] = rf_ini[i].rf_value[mode];
+		rf[i] = rf_ini[i].rfb_mode_data[mode];
 	}
 
 	/*
@@ -1577,7 +484,7 @@ static int ath5k_hw_rf5413_rfregs(struct ath5k_hw *ah,
 
 	/* Write RF values */
 	for (i = 0; i < rf_size; i++)
-		ath5k_hw_reg_write(ah, rf[i], rf_ini[i].rf_register);
+		ath5k_hw_reg_write(ah, rf[i], rf_ini[i].rfb_ctrl_register);
 
 	return 0;
 }
@@ -1593,26 +500,26 @@ int ath5k_hw_rfregs(struct ath5k_hw *ah, struct ieee80211_channel *channel,
 
 	switch (ah->ah_radio) {
 	case AR5K_RF5111:
-		ah->ah_rf_banks_size = sizeof(rfregs_5111);
+		ah->ah_rf_banks_size = sizeof(rfb_5111);
 		func = ath5k_hw_rf5111_rfregs;
 		break;
 	case AR5K_RF5112:
 		if (ah->ah_radio_5ghz_revision >= AR5K_SREV_RAD_5112A)
-			ah->ah_rf_banks_size = sizeof(rfregs_5112a);
+			ah->ah_rf_banks_size = sizeof(rfb_5112a);
 		else
-			ah->ah_rf_banks_size = sizeof(rfregs_5112);
+			ah->ah_rf_banks_size = sizeof(rfb_5112);
 		func = ath5k_hw_rf5112_rfregs;
 		break;
 	case AR5K_RF5413:
-		ah->ah_rf_banks_size = sizeof(rfregs_5413);
+		ah->ah_rf_banks_size = sizeof(rfb_5413);
 		func = ath5k_hw_rf5413_rfregs;
 		break;
 	case AR5K_RF2413:
-		ah->ah_rf_banks_size = sizeof(rfregs_2413);
+		ah->ah_rf_banks_size = sizeof(rfb_2413);
 		func = ath5k_hw_rf5413_rfregs;
 		break;
 	case AR5K_RF2425:
-		ah->ah_rf_banks_size = sizeof(rfregs_2425);
+		ah->ah_rf_banks_size = sizeof(rfb_2425);
 		func = ath5k_hw_rf5413_rfregs;
 		break;
 	default:
@@ -1656,12 +563,10 @@ int ath5k_hw_rfgain(struct ath5k_hw *ah, unsigned int freq)
 	case AR5K_RF2413:
 		ath5k_rfg = rfgain_2413;
 		size = ARRAY_SIZE(rfgain_2413);
-		freq = 0; /* only 2Ghz */
 		break;
 	case AR5K_RF2425:
 		ath5k_rfg = rfgain_2425;
 		size = ARRAY_SIZE(rfgain_2425);
-		freq = 0; /* only 2Ghz */
 		break;
 	default:
 		return -EINVAL;