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authorSenthil Balasubramanian <senthilkumar@atheros.com>2010-04-15 17:38:29 -0400
committerJohn W. Linville <linville@tuxdriver.com>2010-04-16 15:43:22 -0400
commit1f3f06184006dff1ec439c56dcee9a99ed93e985 (patch)
treec4a81e2b2d1c4c5954c39dacb86480609ec1115c /drivers/net/wireless/ath
parentad7b806065f5791696a1c9a4c2665f6421cbbf05 (diff)
ath9k_hw: update the chip tests for AR9003
The AR9003 family requires a change on the loop and can also skip testing the PHY timing registers. This chip test can now be used by all Atheros hardware families, including legacy. We can eventually move this out to the generic ath module. Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com> Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath')
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index b4a8af1a544..034b6fdf01f 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -297,18 +297,25 @@ static void ath9k_hw_disablepcie(struct ath_hw *ah)
REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
}
+/* This should work for all families including legacy */
static bool ath9k_hw_chip_test(struct ath_hw *ah)
{
struct ath_common *common = ath9k_hw_common(ah);
- u32 regAddr[2] = { AR_STA_ID0, AR_PHY_BASE + (8 << 2) };
+ u32 regAddr[2] = { AR_STA_ID0 };
u32 regHold[2];
u32 patternData[4] = { 0x55555555,
0xaaaaaaaa,
0x66666666,
0x99999999 };
- int i, j;
+ int i, j, loop_max;
- for (i = 0; i < 2; i++) {
+ if (!AR_SREV_9300_20_OR_LATER(ah)) {
+ loop_max = 2;
+ regAddr[1] = AR_PHY_BASE + (8 << 2);
+ } else
+ loop_max = 1;
+
+ for (i = 0; i < loop_max; i++) {
u32 addr = regAddr[i];
u32 wrData, rdData;