diff options
author | Michael Buesch <mb@bu3sch.de> | 2009-02-04 19:55:22 +0100 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-02-11 11:44:23 -0500 |
commit | ce1a9ee33a5864f3d199baa1d3e154a1f9a6f3dd (patch) | |
tree | 2fc0e301b7d81a401b7114608134413897c4296a /drivers/net/wireless/b43/phy_lp.h | |
parent | 7a9470806053f765ecf7f3932acb4c95c204ad4b (diff) |
b43: Add parts of LP-PHY TX power control
This adds the initial parts of the LP-PHY TX power control.
This also adds helper functions for bulk access of LP tables.
Signed-off-by: Michael Buesch <mb@bu3sch.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43/phy_lp.h')
-rw-r--r-- | drivers/net/wireless/b43/phy_lp.h | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/net/wireless/b43/phy_lp.h b/drivers/net/wireless/b43/phy_lp.h index 80703c58102..18370b4ac38 100644 --- a/drivers/net/wireless/b43/phy_lp.h +++ b/drivers/net/wireless/b43/phy_lp.h @@ -247,6 +247,10 @@ #define B43_LPPHY_FOURWIRE_CTL B43_PHY_OFDM(0xA2) /* fourwire Control */ #define B43_LPPHY_CPA_TAILCOUNT_VAL B43_PHY_OFDM(0xA3) /* CPA TailCount Value */ #define B43_LPPHY_TX_PWR_CTL_CMD B43_PHY_OFDM(0xA4) /* TX Power Control Cmd */ +#define B43_LPPHY_TX_PWR_CTL_CMD_MODE 0xE000 /* TX power control mode mask */ +#define B43_LPPHY_TX_PWR_CTL_CMD_MODE_OFF 0x0000 /* TX power control is OFF */ +#define B43_LPPHY_TX_PWR_CTL_CMD_MODE_SW 0x8000 /* TX power control is SOFTWARE */ +#define B43_LPPHY_TX_PWR_CTL_CMD_MODE_HW 0xE000 /* TX power control is HARDWARE */ #define B43_LPPHY_TX_PWR_CTL_NNUM B43_PHY_OFDM(0xA5) /* TX Power Control Nnum */ #define B43_LPPHY_TX_PWR_CTL_IDLETSSI B43_PHY_OFDM(0xA6) /* TX Power Control IdleTssi */ #define B43_LPPHY_TX_PWR_CTL_TARGETPWR B43_PHY_OFDM(0xA7) /* TX Power Control TargetPower */ @@ -802,7 +806,17 @@ +enum b43_lpphy_txpctl_mode { + B43_LPPHY_TXPCTL_UNKNOWN = 0, + B43_LPPHY_TXPCTL_OFF, /* TX power control is OFF */ + B43_LPPHY_TXPCTL_SW, /* TX power control is set to Software */ + B43_LPPHY_TXPCTL_HW, /* TX power control is set to Hardware */ +}; + struct b43_phy_lp { + /* Current TX power control mode. */ + enum b43_lpphy_txpctl_mode txpctl_mode; + /* Transmit isolation medium band */ u8 tx_isolation_med_band; /* FIXME initial value? */ /* Transmit isolation low band */ @@ -814,7 +828,7 @@ struct b43_phy_lp { u8 rx_pwr_offset; /* FIXME initial value? */ /* TSSI transmit count */ - u16 tssi_tx_count; /* FIXME initial value? */ + u16 tssi_tx_count; /* TSSI index */ u16 tssi_idx; /* FIXME initial value? */ /* TSSI npt */ |