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authorEmmanuel Grumbach <emmanuel.grumbach@intel.com>2013-12-22 15:09:40 +0200
committerEmmanuel Grumbach <emmanuel.grumbach@intel.com>2013-12-31 19:03:43 +0200
commitb9439491055a18ee075614139abadfd74c1b887f (patch)
tree41845bfb442438e01acb78c3181adbd72a1ce761 /drivers/net/wireless/iwlwifi/pcie/internal.h
parenta4a1247847ca9ae2fd96e0684a74acd551791000 (diff)
iwlwifi: pcie: keep the NIC awake when commands are in flight
Under very specific circumstances, the firmware might ignore a host command. This was debugged and we ended up seeing that the power management hardware was faulty. In order to workaround this issue, we keep the NIC awake as long as we have host commands in flight. This will avoid to put the hardware into buggy condition. Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/pcie/internal.h')
-rw-r--r--drivers/net/wireless/iwlwifi/pcie/internal.h29
1 files changed, 29 insertions, 0 deletions
diff --git a/drivers/net/wireless/iwlwifi/pcie/internal.h b/drivers/net/wireless/iwlwifi/pcie/internal.h
index 9dfee7ed2e3..809052442e9 100644
--- a/drivers/net/wireless/iwlwifi/pcie/internal.h
+++ b/drivers/net/wireless/iwlwifi/pcie/internal.h
@@ -262,6 +262,7 @@ iwl_pcie_get_scratchbuf_dma(struct iwl_txq *txq, int idx)
* @rx_page_order: page order for receive buffer size
* @wd_timeout: queue watchdog timeout (jiffies)
* @reg_lock: protect hw register access
+ * @cmd_in_flight: true when we have a host command in flight
*/
struct iwl_trans_pcie {
struct iwl_rxq rxq;
@@ -310,6 +311,7 @@ struct iwl_trans_pcie {
/*protect hw register */
spinlock_t reg_lock;
+ bool cmd_in_flight;
};
#define IWL_TRANS_GET_PCIE_TRANS(_iwl_trans) \
@@ -459,4 +461,31 @@ static inline bool iwl_is_rfkill_set(struct iwl_trans *trans)
CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
}
+static inline void __iwl_trans_pcie_set_bits_mask(struct iwl_trans *trans,
+ u32 reg, u32 mask, u32 value)
+{
+ u32 v;
+
+#ifdef CONFIG_IWLWIFI_DEBUG
+ WARN_ON_ONCE(value & ~mask);
+#endif
+
+ v = iwl_read32(trans, reg);
+ v &= ~mask;
+ v |= value;
+ iwl_write32(trans, reg, v);
+}
+
+static inline void __iwl_trans_pcie_clear_bit(struct iwl_trans *trans,
+ u32 reg, u32 mask)
+{
+ __iwl_trans_pcie_set_bits_mask(trans, reg, mask, 0);
+}
+
+static inline void __iwl_trans_pcie_set_bit(struct iwl_trans *trans,
+ u32 reg, u32 mask)
+{
+ __iwl_trans_pcie_set_bits_mask(trans, reg, mask, mask);
+}
+
#endif /* __iwl_trans_int_pcie_h__ */