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authorJohannes Berg <johannes.berg@intel.com>2013-05-17 12:01:26 +0200
committerJohannes Berg <johannes.berg@intel.com>2013-05-27 11:39:30 +0200
commit8ade62857ef77bdf639185410fbcd811aa700cb2 (patch)
tree5b42cce7cf802a11fe12514e02d29cffce16d554 /drivers/net/wireless/iwlwifi/pcie/trans.c
parentdfcb4c3aacedee6838e436fb575b31e138505203 (diff)
iwlwifi: move D3_CFG_COMPLETE handling into DVM
The MVM firmware doesn't communicate this way, it instead assumes D3 configuration is complete after a specific host command (which must be last) has been sent. Handling this bit thus belongs into the firmware API code, i.e. DVM. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Reviewed-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/pcie/trans.c')
-rw-r--r--drivers/net/wireless/iwlwifi/pcie/trans.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/net/wireless/iwlwifi/pcie/trans.c b/drivers/net/wireless/iwlwifi/pcie/trans.c
index a785f49df9b..0b021305eed 100644
--- a/drivers/net/wireless/iwlwifi/pcie/trans.c
+++ b/drivers/net/wireless/iwlwifi/pcie/trans.c
@@ -580,10 +580,6 @@ static void iwl_trans_pcie_stop_device(struct iwl_trans *trans)
static void iwl_trans_pcie_d3_suspend(struct iwl_trans *trans)
{
- /* let the ucode operate on its own */
- iwl_write32(trans, CSR_UCODE_DRV_GP1_SET,
- CSR_UCODE_DRV_GP1_BIT_D3_CFG_COMPLETE);
-
iwl_disable_interrupts(trans);
iwl_pcie_disable_ict(trans);
@@ -643,9 +639,6 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
return ret;
}
- iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR,
- CSR_UCODE_DRV_GP1_BIT_D3_CFG_COMPLETE);
-
*status = IWL_D3_STATUS_ALIVE;
return 0;
}