diff options
| author | Shahar Levi <shahar_levi@ti.com> | 2011-03-06 16:32:13 +0200 |
|---|---|---|
| committer | Luciano Coelho <coelho@ti.com> | 2011-04-19 16:49:00 +0300 |
| commit | ae77eccf04f8c36769bdba334e1bbcc7bb9d3644 (patch) | |
| tree | 194dfe308ae19ae5ace06f5c9fbb38532976c7b4 /drivers/net/wireless/wl12xx/rx.c | |
| parent | 13b107dd9808343d05627f0fba7fbc764c86738e (diff) | |
wl12xx: 1281/1283 support - Improve Tx & Rx path
Reduced bus transactions in the Tx & Rx path.
[Removed unnecessary check wl->chip.id != CHIP_ID_1283_PG20 when
checking the quirk -- Luca]
Signed-off-by: Shahar Levi <shahar_levi@ti.com>
Reviewed-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>
Diffstat (limited to 'drivers/net/wireless/wl12xx/rx.c')
| -rw-r--r-- | drivers/net/wireless/wl12xx/rx.c | 31 |
1 files changed, 19 insertions, 12 deletions
diff --git a/drivers/net/wireless/wl12xx/rx.c b/drivers/net/wireless/wl12xx/rx.c index 919b59f0030..132b0cab569 100644 --- a/drivers/net/wireless/wl12xx/rx.c +++ b/drivers/net/wireless/wl12xx/rx.c @@ -163,18 +163,25 @@ void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_common_status *status) break; } - /* - * Choose the block we want to read - * For aggregated packets, only the first memory block should - * be retrieved. The FW takes care of the rest. - */ - mem_block = wl1271_rx_get_mem_block(status, drv_rx_counter); - wl->rx_mem_pool_addr.addr = (mem_block << 8) + - le32_to_cpu(wl_mem_map->packet_memory_pool_start); - wl->rx_mem_pool_addr.addr_extra = - wl->rx_mem_pool_addr.addr + 4; - wl1271_write(wl, WL1271_SLV_REG_DATA, &wl->rx_mem_pool_addr, - sizeof(wl->rx_mem_pool_addr), false); + if (wl->chip.id != CHIP_ID_1283_PG20) { + /* + * Choose the block we want to read + * For aggregated packets, only the first memory block + * should be retrieved. The FW takes care of the rest. + */ + mem_block = wl1271_rx_get_mem_block(status, + drv_rx_counter); + + wl->rx_mem_pool_addr.addr = (mem_block << 8) + + le32_to_cpu(wl_mem_map->packet_memory_pool_start); + + wl->rx_mem_pool_addr.addr_extra = + wl->rx_mem_pool_addr.addr + 4; + + wl1271_write(wl, WL1271_SLV_REG_DATA, + &wl->rx_mem_pool_addr, + sizeof(wl->rx_mem_pool_addr), false); + } /* Read all available packets at once */ wl1271_read(wl, WL1271_SLV_MEM_DATA, wl->aggr_buf, |