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authorMichael Buesch <mb@bu3sch.de>2007-12-12 22:05:18 +0100
committerDavid S. Miller <davem@davemloft.net>2008-01-28 15:05:59 -0800
commit38d1b4ce901506729f6c7f9a14f02f4327c577cc (patch)
treec7b55f18baea728ebad228b2ec5d5eeaeedb36b2 /drivers/net
parent8ed7fc48eb31e583bb31c2bcfdd3a9c557bad5d0 (diff)
b43: Fix for broken transmission
This patch fixes the transmission problems introduced by commit f04b3787bbce4567e28069a9ec97dcd804626ac7 I'm not sure if the dummy read is really required. The old code does it. I think it can't hurt and can possibly fix some write posting problems (hardware bugs or whatever. Who knows). Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/wireless/b43/phy.h6
-rw-r--r--drivers/net/wireless/b43/tables.c2
-rw-r--r--drivers/net/wireless/b43/wa.c30
3 files changed, 23 insertions, 15 deletions
diff --git a/drivers/net/wireless/b43/phy.h b/drivers/net/wireless/b43/phy.h
index 1c7eac25a30..3525f565246 100644
--- a/drivers/net/wireless/b43/phy.h
+++ b/drivers/net/wireless/b43/phy.h
@@ -25,7 +25,7 @@ struct b43_phy;
#define B43_PHY_BBANDCFG_RXANT 0x180 /* RX Antenna selection */
#define B43_PHY_BBANDCFG_RXANT_SHIFT 7
#define B43_PHY_PWRDOWN B43_PHY_OFDM(0x03) /* Powerdown */
-#define B43_PHY_CRSTHRES1 B43_PHY_OFDM(0x06) /* CRS Threshold 1 */
+#define B43_PHY_CRSTHRES1_R1 B43_PHY_OFDM(0x06) /* CRS Threshold 1 (phy.rev 1 only) */
#define B43_PHY_LNAHPFCTL B43_PHY_OFDM(0x1C) /* LNA/HPF control */
#define B43_PHY_LPFGAINCTL B43_PHY_OFDM(0x20) /* LPF Gain control */
#define B43_PHY_ADIVRELATED B43_PHY_OFDM(0x27) /* FIXME rename */
@@ -69,8 +69,8 @@ struct b43_phy;
#define B43_PHY_DIVP1P2GAIN B43_PHY_OFDM(0xAB)
#define B43_PHY_DIVSRCHGAINBACK B43_PHY_OFDM(0xAD) /* Divider search gain back */
#define B43_PHY_DIVSRCHGAINCHNG B43_PHY_OFDM(0xAE) /* Divider search gain change */
-#define B43_PHY_CRSTHRES1_R1 B43_PHY_OFDM(0xC0) /* CRS Threshold 1 (rev 1 only) */
-#define B43_PHY_CRSTHRES2_R1 B43_PHY_OFDM(0xC1) /* CRS Threshold 2 (rev 1 only) */
+#define B43_PHY_CRSTHRES1 B43_PHY_OFDM(0xC0) /* CRS Threshold 1 (phy.rev >= 2 only) */
+#define B43_PHY_CRSTHRES2 B43_PHY_OFDM(0xC1) /* CRS Threshold 2 (phy.rev >= 2 only) */
#define B43_PHY_TSSIP_LTBASE B43_PHY_OFDM(0x380) /* TSSI power lookup table base */
#define B43_PHY_DC_LTBASE B43_PHY_OFDM(0x3A0) /* DC lookup table base */
#define B43_PHY_GAIN_LTBASE B43_PHY_OFDM(0x3C0) /* Gain lookup table base */
diff --git a/drivers/net/wireless/b43/tables.c b/drivers/net/wireless/b43/tables.c
index fd5595ba5e8..3f5ea06bf13 100644
--- a/drivers/net/wireless/b43/tables.c
+++ b/drivers/net/wireless/b43/tables.c
@@ -403,7 +403,7 @@ void b43_ofdmtab_write16(struct b43_wldev *dev, u16 table,
addr = table + offset;
if ((phy->ofdmtab_addr_direction != B43_OFDMTAB_DIRECTION_WRITE) ||
- (addr -1 != phy->ofdmtab_addr)) {
+ (addr - 1 != phy->ofdmtab_addr)) {
/* The hardware has a different address in memory. Update it. */
b43_phy_write(dev, B43_PHY_OTABLECTL, addr);
phy->ofdmtab_addr_direction = B43_OFDMTAB_DIRECTION_WRITE;
diff --git a/drivers/net/wireless/b43/wa.c b/drivers/net/wireless/b43/wa.c
index 0ba7f948bee..e632125cb77 100644
--- a/drivers/net/wireless/b43/wa.c
+++ b/drivers/net/wireless/b43/wa.c
@@ -123,17 +123,24 @@ static void b43_wa_rssi_lt(struct b43_wldev *dev) /* RSSI lookup table */
{
int i;
- for (i = 0; i < 8; i++)
- b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i + 8);
- for (i = 8; i < 16; i++)
- b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i - 8);
+ if (0 /* FIXME: For APHY.rev=2 this might be needed */) {
+ for (i = 0; i < 8; i++)
+ b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i + 8);
+ for (i = 8; i < 16; i++)
+ b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i - 8);
+ } else {
+ for (i = 0; i < 64; i++)
+ b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i);
+ }
}
static void b43_wa_analog(struct b43_wldev *dev)
{
struct b43_phy *phy = &dev->phy;
+ u16 ofdmrev;
- if (phy->analog > 2) {
+ ofdmrev = b43_phy_read(dev, B43_PHY_VERSION_OFDM) & B43_PHYVER_VERSION;
+ if (ofdmrev > 2) {
if (phy->type == B43_PHYTYPE_A)
b43_phy_write(dev, B43_PHY_PWRDOWN, 0x1808);
else
@@ -306,16 +313,16 @@ static void b43_wa_crs_ed(struct b43_wldev *dev)
struct b43_phy *phy = &dev->phy;
if (phy->rev == 1) {
- b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x4F19);
+ b43_phy_write(dev, B43_PHY_CRSTHRES1_R1, 0x4F19);
} else if (phy->rev == 2) {
- b43_phy_write(dev, B43_PHY_CRSTHRES1_R1, 0x1861);
- b43_phy_write(dev, B43_PHY_CRSTHRES2_R1, 0x1861);
+ b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x1861);
+ b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0271);
b43_phy_write(dev, B43_PHY_ANTDWELL,
b43_phy_read(dev, B43_PHY_ANTDWELL)
| 0x0800);
} else {
- b43_phy_write(dev, B43_PHY_CRSTHRES1_R1, 0x0098);
- b43_phy_write(dev, B43_PHY_CRSTHRES2_R1, 0x0070);
+ b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x0098);
+ b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0070);
b43_phy_write(dev, B43_PHY_OFDM(0xC9), 0x0080);
b43_phy_write(dev, B43_PHY_ANTDWELL,
b43_phy_read(dev, B43_PHY_ANTDWELL)
@@ -441,7 +448,7 @@ static void b43_wa_altagc(struct b43_wldev *dev)
}
}
b43_phy_write(dev, B43_PHY_DIVSRCHIDX,
- (b43_phy_read(dev, B43_PHY_DIVSRCHIDX) & 0x7F7F) | 0x7874);
+ (b43_phy_read(dev, B43_PHY_DIVSRCHIDX) & 0x8080) | 0x7874);
b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x1C00);
if (phy->rev == 1) {
b43_phy_write(dev, B43_PHY_DIVP1P2GAIN,
@@ -466,6 +473,7 @@ static void b43_wa_altagc(struct b43_wldev *dev)
b43_phy_write(dev, B43_PHY_OFDM(0x26),
b43_phy_read(dev, B43_PHY_OFDM(0x26)) & ~0x1000);
}
+ b43_phy_read(dev, B43_PHY_VERSION_OFDM); /* Dummy read */
}
static void b43_wa_tr_ltov(struct b43_wldev *dev) /* TR Lookup Table Original Values */