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authorBruce Allan <bruce.w.allan@intel.com>2012-05-10 02:34:39 +0000
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2012-05-17 04:19:48 -0700
commitba9e186faf9f6bffa5a9bb62891bf9beed9dd7ca (patch)
treeb08c3748eb80a0cc99c5471788ae44776ca09dbf /drivers/net
parentdc6b9b78234fecdc6d2ca5e1629185718202bcf5 (diff)
e1000e: fix typo in definition of E1000_CTRL_EXT_FORCE_SMBUS
This define is needed by i217. Reported-by: Bjorn Mork <bjorn@mork.no> Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/ethernet/intel/e1000e/defines.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/defines.h b/drivers/net/ethernet/intel/e1000e/defines.h
index 11c46661af0..351a4097b2b 100644
--- a/drivers/net/ethernet/intel/e1000e/defines.h
+++ b/drivers/net/ethernet/intel/e1000e/defines.h
@@ -76,7 +76,7 @@
/* Extended Device Control */
#define E1000_CTRL_EXT_LPCD 0x00000004 /* LCD Power Cycle Done */
#define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Definable Pin 3 */
-#define E1000_CTRL_EXT_FORCE_SMBUS 0x00000004 /* Force SMBus mode*/
+#define E1000_CTRL_EXT_FORCE_SMBUS 0x00000800 /* Force SMBus mode */
#define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */
#define E1000_CTRL_EXT_SPD_BYPS 0x00008000 /* Speed Select Bypass */
#define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */