diff options
| author | Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com> | 2011-12-07 16:51:39 +0530 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2011-12-16 09:30:42 -0500 |
| commit | 1b2538b2ab8f37e55b91b3cce98d2df5c126125d (patch) | |
| tree | 9b0bd6720383ca2532e508846becf97548858698 /drivers/net | |
| parent | 356cb55d81d1692bd74b96c71deeb7e1cf956196 (diff) | |
ath9k_hw: remove ATH9K_HW_CAP_CST
its not used anywhere in the current code
Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 6 | ||||
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.h | 31 |
2 files changed, 17 insertions, 20 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 080fac4d2e3..8cda9a1513a 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c @@ -2399,12 +2399,10 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) else pCap->num_gpio_pins = AR_NUM_GPIO; - if (AR_SREV_9160_10_OR_LATER(ah) || AR_SREV_9100(ah)) { - pCap->hw_caps |= ATH9K_HW_CAP_CST; + if (AR_SREV_9160_10_OR_LATER(ah) || AR_SREV_9100(ah)) pCap->rts_aggr_limit = ATH_AMPDU_LIMIT_MAX; - } else { + else pCap->rts_aggr_limit = (8 * 1024); - } #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE) ah->rfsilent = ah->eep_ops->get_eeprom(ah, EEP_RF_SILENT); diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index aadc7923b0c..615cc839f0d 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h @@ -196,22 +196,21 @@ enum ath_ini_subsys { enum ath9k_hw_caps { ATH9K_HW_CAP_HT = BIT(0), ATH9K_HW_CAP_RFSILENT = BIT(1), - ATH9K_HW_CAP_CST = BIT(2), - ATH9K_HW_CAP_AUTOSLEEP = BIT(4), - ATH9K_HW_CAP_4KB_SPLITTRANS = BIT(5), - ATH9K_HW_CAP_EDMA = BIT(6), - ATH9K_HW_CAP_RAC_SUPPORTED = BIT(7), - ATH9K_HW_CAP_LDPC = BIT(8), - ATH9K_HW_CAP_FASTCLOCK = BIT(9), - ATH9K_HW_CAP_SGI_20 = BIT(10), - ATH9K_HW_CAP_PAPRD = BIT(11), - ATH9K_HW_CAP_ANT_DIV_COMB = BIT(12), - ATH9K_HW_CAP_2GHZ = BIT(13), - ATH9K_HW_CAP_5GHZ = BIT(14), - ATH9K_HW_CAP_APM = BIT(15), - ATH9K_HW_CAP_RTT = BIT(16), - ATH9K_HW_CAP_MCI = BIT(17), - ATH9K_HW_CAP_DFS = BIT(18), + ATH9K_HW_CAP_AUTOSLEEP = BIT(2), + ATH9K_HW_CAP_4KB_SPLITTRANS = BIT(3), + ATH9K_HW_CAP_EDMA = BIT(4), + ATH9K_HW_CAP_RAC_SUPPORTED = BIT(5), + ATH9K_HW_CAP_LDPC = BIT(6), + ATH9K_HW_CAP_FASTCLOCK = BIT(7), + ATH9K_HW_CAP_SGI_20 = BIT(8), + ATH9K_HW_CAP_PAPRD = BIT(9), + ATH9K_HW_CAP_ANT_DIV_COMB = BIT(10), + ATH9K_HW_CAP_2GHZ = BIT(11), + ATH9K_HW_CAP_5GHZ = BIT(12), + ATH9K_HW_CAP_APM = BIT(13), + ATH9K_HW_CAP_RTT = BIT(14), + ATH9K_HW_CAP_MCI = BIT(15), + ATH9K_HW_CAP_DFS = BIT(16), }; struct ath9k_hw_capabilities { |