diff options
author | Wei Yongjun <yongjun_wei@trendmicro.com.cn> | 2013-09-29 10:29:11 +0800 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2013-10-04 16:46:28 -0600 |
commit | f8db3c9086cd33ee3efc913ade291694f54a57f2 (patch) | |
tree | d213730829f53ff36e260f19f29eae63e8805cee /drivers/pci/host | |
parent | f62b878b4dfc71de24ea4bc085d042862cba88e4 (diff) |
PCI: exynos: Add missing clk_disable_unprepare() on error path
Add the missing clk_disable_unprepare() before return
from exynos_pcie_probe() in the error handling case.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
Diffstat (limited to 'drivers/pci/host')
-rw-r--r-- | drivers/pci/host/pci-exynos.c | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c index ee692c2c3d7..89804728bd5 100644 --- a/drivers/pci/host/pci-exynos.c +++ b/drivers/pci/host/pci-exynos.c @@ -599,18 +599,24 @@ static int __init exynos_pcie_probe(struct platform_device *pdev) elbi_base = platform_get_resource(pdev, IORESOURCE_MEM, 0); exynos_pcie->elbi_base = devm_ioremap_resource(&pdev->dev, elbi_base); - if (IS_ERR(exynos_pcie->elbi_base)) - return PTR_ERR(exynos_pcie->elbi_base); + if (IS_ERR(exynos_pcie->elbi_base)) { + ret = PTR_ERR(exynos_pcie->elbi_base); + goto fail_bus_clk; + } phy_base = platform_get_resource(pdev, IORESOURCE_MEM, 1); exynos_pcie->phy_base = devm_ioremap_resource(&pdev->dev, phy_base); - if (IS_ERR(exynos_pcie->phy_base)) - return PTR_ERR(exynos_pcie->phy_base); + if (IS_ERR(exynos_pcie->phy_base)) { + ret = PTR_ERR(exynos_pcie->phy_base); + goto fail_bus_clk; + } block_base = platform_get_resource(pdev, IORESOURCE_MEM, 2); exynos_pcie->block_base = devm_ioremap_resource(&pdev->dev, block_base); - if (IS_ERR(exynos_pcie->block_base)) - return PTR_ERR(exynos_pcie->block_base); + if (IS_ERR(exynos_pcie->block_base)) { + ret = PTR_ERR(exynos_pcie->block_base); + goto fail_bus_clk; + } ret = add_pcie_port(pp, pdev); if (ret < 0) |