diff options
| author | Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> | 2009-02-03 15:06:16 +0900 |
|---|---|---|
| committer | Jesse Barnes <jbarnes@hobbes.lan> | 2009-03-19 19:29:29 -0700 |
| commit | 99f0169c17f334a11b0ace91188501c612f3e1e6 (patch) | |
| tree | 1dab8a0f010f62611945063abcd6f988dca7bf3e /drivers/pci/hotplug/pciehp.h | |
| parent | 81b840cd27e3ee9af67b6e05a4847868f74fce69 (diff) | |
PCI: pciehp: enable software notification on empty slots
Current pciehp disables software notification of adapter presence
changed event and MRL changed event when slot is turned off. Because
of this, there is no way to detect those events on empty slots in the
current pciehp implementation.
According to the past discussion(*), this behavior was introduced to
prevent endless loop that could happen if pcie_isr() runs after power
fault is detected on a certain platform whose stickey power-fault bit
remains on till the slot is powered on again.
(*) http://sourceforge.net/mailarchive/message.php?msg_id=20051130135409.A14918%40unix-os.sc.intel.com
I think this endless loop can be avoided using one bit flag that
indicates power fault had been detected, instead of disabling software
notification of adapter present changed event and MRL changed event.
With this patch, we can enable software notification mechanism of
presence changed and MRL changed event on the empty slots again.
Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci/hotplug/pciehp.h')
| -rw-r--r-- | drivers/pci/hotplug/pciehp.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h index 1f887f64e49..2bf8d28062e 100644 --- a/drivers/pci/hotplug/pciehp.h +++ b/drivers/pci/hotplug/pciehp.h @@ -112,6 +112,7 @@ struct controller { unsigned int no_cmd_complete:1; unsigned int link_active_reporting:1; unsigned int notification_enabled:1; + unsigned int power_fault_detected; }; #define INT_BUTTON_IGNORE 0 |