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authorKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>2006-12-21 17:01:08 -0800
committerGreg Kroah-Hartman <gregkh@suse.de>2007-02-07 15:50:05 -0800
commit75e13178af33e20b5802885f637af2a82c64ac2c (patch)
tree73af18b3bf9bdfc1d956683fd338c684788b1382 /drivers/pci/hotplug/pciehp_hpc.c
parent15232ece5566710d24c81ac3dd629f7556a92818 (diff)
pciehp: remove unused pcie_cap_base
This patch removes unused pcie_cap_base variable. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/pci/hotplug/pciehp_hpc.c')
-rw-r--r--drivers/pci/hotplug/pciehp_hpc.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 98eee63f3ec..d8f4f1241b5 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -105,7 +105,6 @@ enum ctrl_offsets {
ROOTCTRL = offsetof(struct ctrl_reg, root_ctrl),
ROOTSTATUS = offsetof(struct ctrl_reg, root_status),
};
-static int pcie_cap_base = 0; /* Base of the PCI Express capability item structure */
static inline int pciehp_readw(struct controller *ctrl, int reg, u16 *value)
{
@@ -1072,7 +1071,7 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
u16 cap_reg;
u16 intr_enable = 0;
u32 slot_cap;
- int cap_base, saved_cap_base;
+ int cap_base;
u16 slot_status, slot_ctrl;
struct pci_dev *pdev;
@@ -1084,8 +1083,6 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
dbg("%s: hotplug controller vendor id 0x%x device id 0x%x\n",
__FUNCTION__, pdev->vendor, pdev->device);
- saved_cap_base = pcie_cap_base;
-
if ((cap_base = pci_find_capability(pdev, PCI_CAP_ID_EXP)) == 0) {
dbg("%s: Can't find PCI_CAP_ID_EXP (0x10)\n", __FUNCTION__);
goto abort_free_ctlr;
@@ -1093,7 +1090,7 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
ctrl->cap_base = cap_base;
- dbg("%s: pcie_cap_base %x\n", __FUNCTION__, pcie_cap_base);
+ dbg("%s: pcie_cap_base %x\n", __FUNCTION__, cap_base);
rc = pciehp_readw(ctrl, CAPREG, &cap_reg);
if (rc) {
@@ -1289,8 +1286,6 @@ abort_free_irq:
free_irq(ctrl->pci_dev->irq, ctrl);
abort_free_ctlr:
- pcie_cap_base = saved_cap_base;
-
DBG_LEAVE_ROUTINE
return -1;
}