diff options
| author | Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> | 2006-05-02 10:57:14 +0900 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2006-06-19 14:13:22 -0700 |
| commit | e22b73501608901bab7ee9b1f8cb67f15e8efb7a (patch) | |
| tree | 4edf850a0216b36c184b6abe43e32a600d4f7787 /drivers/pci/hotplug/shpchp_pci.c | |
| parent | aad20cabaa3d6dfa1e0ebc8fb0537a96d3518b8f (diff) | |
[PATCH] acpi_pcihp: Add support for _HPX
This patch adds support for _HPX (Hot Plug Parameter Extensions)
defined in ACPI3.0a spec.
Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Cc: Kristen Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/pci/hotplug/shpchp_pci.c')
| -rw-r--r-- | drivers/pci/hotplug/shpchp_pci.c | 31 |
1 files changed, 19 insertions, 12 deletions
diff --git a/drivers/pci/hotplug/shpchp_pci.c b/drivers/pci/hotplug/shpchp_pci.c index 257adc23399..0a6b25ef194 100644 --- a/drivers/pci/hotplug/shpchp_pci.c +++ b/drivers/pci/hotplug/shpchp_pci.c @@ -47,21 +47,28 @@ static void program_fw_provided_values(struct pci_dev *dev) return; /* use default values if we can't get them from firmware */ - if (get_hp_params_from_firmware(dev, &hpp)) { - hpp.cache_line_size = 8; - hpp.latency_timer = 0x40; - hpp.enable_serr = 0; - hpp.enable_perr = 0; + if (get_hp_params_from_firmware(dev, &hpp) || + !hpp.t0 || (hpp.t0->revision > 1)) { + printk(KERN_WARNING + "%s: Could not get hotplug parameters. Use defaults\n", + __FUNCTION__); + hpp.t0 = &hpp.type0_data; + hpp.t0->revision = 0; + hpp.t0->cache_line_size = 8; + hpp.t0->latency_timer = 0x40; + hpp.t0->enable_serr = 0; + hpp.t0->enable_perr = 0; } - pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpp.cache_line_size); - pci_write_config_byte(dev, PCI_LATENCY_TIMER, hpp.latency_timer); + pci_write_config_byte(dev, + PCI_CACHE_LINE_SIZE, hpp.t0->cache_line_size); + pci_write_config_byte(dev, PCI_LATENCY_TIMER, hpp.t0->latency_timer); pci_read_config_word(dev, PCI_COMMAND, &pci_cmd); - if (hpp.enable_serr) + if (hpp.t0->enable_serr) pci_cmd |= PCI_COMMAND_SERR; else pci_cmd &= ~PCI_COMMAND_SERR; - if (hpp.enable_perr) + if (hpp.t0->enable_perr) pci_cmd |= PCI_COMMAND_PARITY; else pci_cmd &= ~PCI_COMMAND_PARITY; @@ -70,13 +77,13 @@ static void program_fw_provided_values(struct pci_dev *dev) /* Program bridge control value and child devices */ if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER, - hpp.latency_timer); + hpp.t0->latency_timer); pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &pci_bctl); - if (hpp.enable_serr) + if (hpp.t0->enable_serr) pci_bctl |= PCI_BRIDGE_CTL_SERR; else pci_bctl &= ~PCI_BRIDGE_CTL_SERR; - if (hpp.enable_perr) + if (hpp.t0->enable_perr) pci_bctl |= PCI_BRIDGE_CTL_PARITY; else pci_bctl &= ~PCI_BRIDGE_CTL_PARITY; |