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authorIan Abbott <abbotti@mev.co.uk>2012-10-29 14:40:18 +0000
committerBjorn Helgaas <bhelgaas@google.com>2012-11-07 15:24:19 -0700
commit2794bb28b66b61eca15ffc492463001445a47227 (patch)
treefa74a8b9d9a3f9a96d4e3151db3d396c6050e9d4 /drivers/pci
parent21c5fd97380ba22c2a616b482307b2ef94429f31 (diff)
PCI: Add PLX PCI 9050 workaround for some Meilhaus DAQ cards
The Meilhaus ME-2000i and ME-2600i data acquisition cards supported by the Comedi "me_daq" driver use the PLX PCI 9050 PCI Target bridge chip affected by the bug that prevents the chip's local configuration registers being read from BAR0 or BAR1 base addresses that are an odd multiple of 128 bytes. Use the PLX PCI 9050 quirk handler for these devices to re-allocate affected regions to a 256-byte boundary. Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/quirks.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 2d0d1c229c6..0c59f7aba12 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1817,6 +1817,17 @@ static void __devinit quirk_plx_pci9050(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
quirk_plx_pci9050);
+/*
+ * The following Meilhaus (vendor ID 0x1402) device IDs (amongst others)
+ * may be using the PLX PCI 9050: 0x0630, 0x0940, 0x0950, 0x0960, 0x100b,
+ * 0x1400, 0x140a, 0x140b, 0x14e0, 0x14ea, 0x14eb, 0x1604, 0x1608, 0x160c,
+ * 0x168f, 0x2000, 0x2600, 0x3000, 0x810a, 0x810b.
+ *
+ * Currently, device IDs 0x2000 and 0x2600 are used by the Comedi "me_daq"
+ * driver.
+ */
+DECLARE_PCI_FIXUP_HEADER(0x1402, 0x2000, quirk_plx_pci9050);
+DECLARE_PCI_FIXUP_HEADER(0x1402, 0x2600, quirk_plx_pci9050);
static void __devinit quirk_netmos(struct pci_dev *dev)
{