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authorVipul Kumar Samar <vipulkumar.samar@st.com>2012-10-27 14:47:50 +0530
committerLinus Walleij <linus.walleij@linaro.org>2012-11-05 12:33:57 +0100
commit82a2deb93cb2237e3a91db6d0317571ecbd6e531 (patch)
treec6f5625e2e5b9245f29699dd93234d65b35677fe /drivers/pinctrl
parentb06fbfdb06da61154b9498ff8e83377d3d795081 (diff)
pinctrl: SPEAr1310: Fix value of PERIP_CFG reigster and MCIF_SEL_SHIFT
This patch fixes two macros: PERIP_CFG registers offset and MCIF selection shift. Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/spear/pinctrl-spear1310.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pinctrl/spear/pinctrl-spear1310.c b/drivers/pinctrl/spear/pinctrl-spear1310.c
index c720d09029b..baf98ae0b1c 100644
--- a/drivers/pinctrl/spear/pinctrl-spear1310.c
+++ b/drivers/pinctrl/spear/pinctrl-spear1310.c
@@ -25,8 +25,8 @@ static const struct pinctrl_pin_desc spear1310_pins[] = {
};
/* registers */
-#define PERIP_CFG 0x32C
- #define MCIF_SEL_SHIFT 3
+#define PERIP_CFG 0x3B0
+ #define MCIF_SEL_SHIFT 5
#define MCIF_SEL_SD (0x1 << MCIF_SEL_SHIFT)
#define MCIF_SEL_CF (0x2 << MCIF_SEL_SHIFT)
#define MCIF_SEL_XD (0x3 << MCIF_SEL_SHIFT)