diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2013-02-05 20:10:57 +0100 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2013-02-07 17:26:53 +0100 |
commit | a950cb741bb62d5f23860755388ad4e93dd2a185 (patch) | |
tree | def8812814c93a59f83160031db0e67249806908 /drivers/pinctrl | |
parent | f30a3839b33c560b374c69be9ba2621d3d6a3d10 (diff) |
pinctrl/abx500: adjust offset for get_mode()
The set_mode() and get_mode() functions in the abx500 were
not mirrored, leading to the wrong GPIO control bits being
read out.
Cc: Lee Jones <lee.jones@linaro.org>
Reported-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/pinctrl-abx500.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/pinctrl/pinctrl-abx500.c b/drivers/pinctrl/pinctrl-abx500.c index 17508b5820f..0b3aa1c28fb 100644 --- a/drivers/pinctrl/pinctrl-abx500.c +++ b/drivers/pinctrl/pinctrl-abx500.c @@ -401,6 +401,8 @@ static u8 abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, bool alt_bit2; struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); struct alternate_functions af = pct->soc->alternate_functions[gpio]; + /* on ABx5xx, there is no GPIO0, so adjust the offset */ + unsigned offset = gpio - 1; /* * if gpiosel_bit is set to unused, @@ -410,7 +412,7 @@ static u8 abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, return ABX500_DEFAULT; /* read GpioSelx register */ - abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (gpio / 8), + abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8), af.gpiosel_bit, &bit_mode); mode = bit_mode; |