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authorMatthew Wilcox <matthew@wil.cx>2008-03-13 06:55:08 -0600
committerJames Bottomley <James.Bottomley@HansenPartnership.com>2008-04-07 12:15:44 -0500
commit78b4b05db57b04b3ed17dc71259bf1402c04abfa (patch)
tree9d3100ad64dec6c5c3a9aa718682e13e3345c4d3 /drivers/scsi/BusLogic.c
parent5c815d1501a9ce84578cb3ec64c9d31ef91e3de2 (diff)
[SCSI] BusLogic: make FlashPoint support x86-32 only
We've verified that there are 64 bit and endianness problems in the flashpoint driver. Reverse the logic of CONFIG_OMIT_FLASHPOINT (make it CONFIG_SCSI_FLASHPOINT) and make it depend on X86_32 so it can't appear for any other architectures. Long term, if someone chooses, they could make FlashPoint 64 bit compliant (it looks like its a question of fixing up the sizes in some of the packed descriptors) Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi/BusLogic.c')
-rw-r--r--drivers/scsi/BusLogic.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/scsi/BusLogic.c b/drivers/scsi/BusLogic.c
index 4d3ebb1af49..2d689af2466 100644
--- a/drivers/scsi/BusLogic.c
+++ b/drivers/scsi/BusLogic.c
@@ -896,7 +896,7 @@ static int __init BusLogic_InitializeFlashPointProbeInfo(struct BusLogic_HostAda
IRQ_Channel = PCI_Device->irq;
IO_Address = BaseAddress0 = pci_resource_start(PCI_Device, 0);
PCI_Address = BaseAddress1 = pci_resource_start(PCI_Device, 1);
-#ifndef CONFIG_SCSI_OMIT_FLASHPOINT
+#ifdef CONFIG_SCSI_FLASHPOINT
if (pci_resource_flags(PCI_Device, 0) & IORESOURCE_MEM) {
BusLogic_Error("BusLogic: Base Address0 0x%X not I/O for " "FlashPoint Host Adapter\n", NULL, BaseAddress0);
BusLogic_Error("at PCI Bus %d Device %d I/O Address 0x%X\n", NULL, Bus, Device, IO_Address);
@@ -1006,6 +1006,9 @@ static void __init BusLogic_InitializeProbeInfoList(struct BusLogic_HostAdapter
}
+#else
+#define BusLogic_InitializeProbeInfoList(adapter) \
+ BusLogic_InitializeProbeInfoListISA(adapter)
#endif /* CONFIG_PCI */