diff options
author | Jing Huang <huangj@brocade.com> | 2010-10-18 17:12:29 -0700 |
---|---|---|
committer | James Bottomley <James.Bottomley@suse.de> | 2010-10-25 16:18:20 -0500 |
commit | 5344026065f79b102fcc44bc6332f856a111962a (patch) | |
tree | c28f91eb4593e3e89b030a65a4fd71b8b43cc1f1 /drivers/scsi/bfa/bfa_ioc_cb.c | |
parent | ba816ea8e2eacbf3d198ad1859f413c2d6213434 (diff) |
[SCSI] bfa: remove os wrapper functions and macros
This patch replaces register access functions and macros with the the ones
provided by linux.
Signed-off-by: Jing Huang <huangj@brocade.com>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi/bfa/bfa_ioc_cb.c')
-rw-r--r-- | drivers/scsi/bfa/bfa_ioc_cb.c | 64 |
1 files changed, 29 insertions, 35 deletions
diff --git a/drivers/scsi/bfa/bfa_ioc_cb.c b/drivers/scsi/bfa/bfa_ioc_cb.c index a32c8601c51..86210a5f724 100644 --- a/drivers/scsi/bfa/bfa_ioc_cb.c +++ b/drivers/scsi/bfa/bfa_ioc_cb.c @@ -72,8 +72,8 @@ bfa_ioc_cb_firmware_unlock(struct bfa_ioc_s *ioc) static void bfa_ioc_cb_notify_hbfail(struct bfa_ioc_s *ioc) { - bfa_reg_write(ioc->ioc_regs.err_set, __PSS_ERR_STATUS_SET); - bfa_reg_read(ioc->ioc_regs.err_set); + writel(__PSS_ERR_STATUS_SET, ioc->ioc_regs.err_set); + readl(ioc->ioc_regs.err_set); } /** @@ -96,7 +96,7 @@ static struct { u32 hfn, lpu; } iocreg_mbcmd[] = { static void bfa_ioc_cb_reg_init(struct bfa_ioc_s *ioc) { - bfa_os_addr_t rb; + void __iomem *rb; int pcifn = bfa_ioc_pcifn(ioc); rb = bfa_ioc_bar0(ioc); @@ -180,14 +180,14 @@ bfa_ioc_cb_ownership_reset(struct bfa_ioc_s *ioc) * before we clear it. If it is not locked, writing 1 * will lock it instead of clearing it. */ - bfa_reg_read(ioc->ioc_regs.ioc_sem_reg); + readl(ioc->ioc_regs.ioc_sem_reg); bfa_ioc_hw_sem_release(ioc); } bfa_status_t -bfa_ioc_cb_pll_init(bfa_os_addr_t rb, bfa_boolean_t fcmode) +bfa_ioc_cb_pll_init(void __iomem *rb, bfa_boolean_t fcmode) { u32 pll_sclk, pll_fclk; @@ -199,38 +199,32 @@ bfa_ioc_cb_pll_init(bfa_os_addr_t rb, bfa_boolean_t fcmode) __APP_PLL_400_RSEL200500 | __APP_PLL_400_P0_1(3U) | __APP_PLL_400_JITLMT0_1(3U) | __APP_PLL_400_CNTLMT0_1(3U); - bfa_reg_write((rb + BFA_IOC0_STATE_REG), BFI_IOC_UNINIT); - bfa_reg_write((rb + BFA_IOC1_STATE_REG), BFI_IOC_UNINIT); - bfa_reg_write((rb + HOSTFN0_INT_MSK), 0xffffffffU); - bfa_reg_write((rb + HOSTFN1_INT_MSK), 0xffffffffU); - bfa_reg_write((rb + HOSTFN0_INT_STATUS), 0xffffffffU); - bfa_reg_write((rb + HOSTFN1_INT_STATUS), 0xffffffffU); - bfa_reg_write((rb + HOSTFN0_INT_MSK), 0xffffffffU); - bfa_reg_write((rb + HOSTFN1_INT_MSK), 0xffffffffU); - bfa_reg_write(rb + APP_PLL_212_CTL_REG, - __APP_PLL_212_LOGIC_SOFT_RESET); - bfa_reg_write(rb + APP_PLL_212_CTL_REG, - __APP_PLL_212_BYPASS | - __APP_PLL_212_LOGIC_SOFT_RESET); - bfa_reg_write(rb + APP_PLL_400_CTL_REG, - __APP_PLL_400_LOGIC_SOFT_RESET); - bfa_reg_write(rb + APP_PLL_400_CTL_REG, - __APP_PLL_400_BYPASS | - __APP_PLL_400_LOGIC_SOFT_RESET); + writel(BFI_IOC_UNINIT, (rb + BFA_IOC0_STATE_REG)); + writel(BFI_IOC_UNINIT, (rb + BFA_IOC1_STATE_REG)); + writel(0xffffffffU, (rb + HOSTFN0_INT_MSK)); + writel(0xffffffffU, (rb + HOSTFN1_INT_MSK)); + writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS)); + writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS)); + writel(0xffffffffU, (rb + HOSTFN0_INT_MSK)); + writel(0xffffffffU, (rb + HOSTFN1_INT_MSK)); + writel(__APP_PLL_212_LOGIC_SOFT_RESET, rb + APP_PLL_212_CTL_REG); + writel(__APP_PLL_212_BYPASS | __APP_PLL_212_LOGIC_SOFT_RESET, + rb + APP_PLL_212_CTL_REG); + writel(__APP_PLL_400_LOGIC_SOFT_RESET, rb + APP_PLL_400_CTL_REG); + writel(__APP_PLL_400_BYPASS | __APP_PLL_400_LOGIC_SOFT_RESET, + rb + APP_PLL_400_CTL_REG); udelay(2); - bfa_reg_write(rb + APP_PLL_212_CTL_REG, - __APP_PLL_212_LOGIC_SOFT_RESET); - bfa_reg_write(rb + APP_PLL_400_CTL_REG, - __APP_PLL_400_LOGIC_SOFT_RESET); - bfa_reg_write(rb + APP_PLL_212_CTL_REG, - pll_sclk | __APP_PLL_212_LOGIC_SOFT_RESET); - bfa_reg_write(rb + APP_PLL_400_CTL_REG, - pll_fclk | __APP_PLL_400_LOGIC_SOFT_RESET); + writel(__APP_PLL_212_LOGIC_SOFT_RESET, rb + APP_PLL_212_CTL_REG); + writel(__APP_PLL_400_LOGIC_SOFT_RESET, rb + APP_PLL_400_CTL_REG); + writel(pll_sclk | __APP_PLL_212_LOGIC_SOFT_RESET, + rb + APP_PLL_212_CTL_REG); + writel(pll_fclk | __APP_PLL_400_LOGIC_SOFT_RESET, + rb + APP_PLL_400_CTL_REG); udelay(2000); - bfa_reg_write((rb + HOSTFN0_INT_STATUS), 0xffffffffU); - bfa_reg_write((rb + HOSTFN1_INT_STATUS), 0xffffffffU); - bfa_reg_write((rb + APP_PLL_212_CTL_REG), pll_sclk); - bfa_reg_write((rb + APP_PLL_400_CTL_REG), pll_fclk); + writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS)); + writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS)); + writel(pll_sclk, (rb + APP_PLL_212_CTL_REG)); + writel(pll_fclk, (rb + APP_PLL_400_CTL_REG)); return BFA_STATUS_OK; } |