diff options
| author | Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> | 2009-04-07 13:34:16 -0700 |
|---|---|---|
| committer | Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> | 2009-04-07 13:34:16 -0700 |
| commit | 38f4b8c0da01ae7cd9b93386842ce272d6fde9ab (patch) | |
| tree | 3c8c52201aac038094bfea7efdd0984a8f62045e /drivers/scsi/dpt_i2o.c | |
| parent | a811454027352c762e0d5bba1b1d8f7d26bf96ae (diff) | |
| parent | 8e2c4f2844c0e8dcdfe312e5f2204854ca8532c6 (diff) | |
Merge commit 'origin/master' into for-linus/xen/master
* commit 'origin/master': (4825 commits)
Fix build errors due to CONFIG_BRANCH_TRACER=y
parport: Use the PCI IRQ if offered
tty: jsm cleanups
Adjust path to gpio headers
KGDB_SERIAL_CONSOLE check for module
Change KCONFIG name
tty: Blackin CTS/RTS
Change hardware flow control from poll to interrupt driven
Add support for the MAX3100 SPI UART.
lanana: assign a device name and numbering for MAX3100
serqt: initial clean up pass for tty side
tty: Use the generic RS485 ioctl on CRIS
tty: Correct inline types for tty_driver_kref_get()
splice: fix deadlock in splicing to file
nilfs2: support nanosecond timestamp
nilfs2: introduce secondary super block
nilfs2: simplify handling of active state of segments
nilfs2: mark minor flag for checkpoint created by internal operation
nilfs2: clean up sketch file
nilfs2: super block operations fix endian bug
...
Conflicts:
arch/x86/include/asm/thread_info.h
arch/x86/lguest/boot.c
drivers/xen/manage.c
Diffstat (limited to 'drivers/scsi/dpt_i2o.c')
| -rw-r--r-- | drivers/scsi/dpt_i2o.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/scsi/dpt_i2o.c b/drivers/scsi/dpt_i2o.c index 6194ed5d02c..b6af63ca980 100644 --- a/drivers/scsi/dpt_i2o.c +++ b/drivers/scsi/dpt_i2o.c @@ -1014,15 +1014,15 @@ static int adpt_install_hba(struct scsi_host_template* sht, struct pci_dev* pDev * See if we should enable dma64 mode. */ if (sizeof(dma_addr_t) > 4 && - pci_set_dma_mask(pDev, DMA_64BIT_MASK) == 0) { - if (dma_get_required_mask(&pDev->dev) > DMA_32BIT_MASK) + pci_set_dma_mask(pDev, DMA_BIT_MASK(64)) == 0) { + if (dma_get_required_mask(&pDev->dev) > DMA_BIT_MASK(32)) dma64 = 1; } - if (!dma64 && pci_set_dma_mask(pDev, DMA_32BIT_MASK) != 0) + if (!dma64 && pci_set_dma_mask(pDev, DMA_BIT_MASK(32)) != 0) return -EINVAL; /* adapter only supports message blocks below 4GB */ - pci_set_consistent_dma_mask(pDev, DMA_32BIT_MASK); + pci_set_consistent_dma_mask(pDev, DMA_BIT_MASK(32)); base_addr0_phys = pci_resource_start(pDev,0); hba_map0_area_size = pci_resource_len(pDev,0); |