diff options
| author | Xiangliang Yu <yuxiangl@marvell.com> | 2011-05-24 22:37:25 +0800 |
|---|---|---|
| committer | James Bottomley <JBottomley@Parallels.com> | 2011-07-26 10:38:01 +0400 |
| commit | 84fbd0cea11b80d7b7097343d5262004d42b8a9a (patch) | |
| tree | a59d58e1ce8558f02dba14e0cb335ee8bb666306 /drivers/scsi/mvsas/mv_94xx.h | |
| parent | a4632aae8b662b1f32fe3fc558a813cd5c3daae6 (diff) | |
[SCSI] mvsas: misc improvements
Change code to match HBA datasheet.
Change code to make it readable.
Add support big endian for mvs_prd_imt.
Add cpu_to_le32 and cpu_to_le64 to use on addr.
Add scan_finished for structure mvs_prv_info.
Signed-off-by: Xiangliang Yu <yuxiangl@marvell.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi/mvsas/mv_94xx.h')
| -rw-r--r-- | drivers/scsi/mvsas/mv_94xx.h | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/drivers/scsi/mvsas/mv_94xx.h b/drivers/scsi/mvsas/mv_94xx.h index 6fc2c105c9d..d8c12e057ae 100644 --- a/drivers/scsi/mvsas/mv_94xx.h +++ b/drivers/scsi/mvsas/mv_94xx.h @@ -142,8 +142,8 @@ enum sas_sata_vsp_regs { enum chip_register_bits { PHY_MIN_SPP_PHYS_LINK_RATE_MASK = (0x7 << 8), - PHY_MAX_SPP_PHYS_LINK_RATE_MASK = (0x7 << 8), - PHY_NEG_SPP_PHYS_LINK_RATE_MASK_OFFSET = (12), + PHY_MAX_SPP_PHYS_LINK_RATE_MASK = (0x7 << 12), + PHY_NEG_SPP_PHYS_LINK_RATE_MASK_OFFSET = (16), PHY_NEG_SPP_PHYS_LINK_RATE_MASK = (0x3 << PHY_NEG_SPP_PHYS_LINK_RATE_MASK_OFFSET), }; @@ -219,17 +219,24 @@ union reg_phy_cfg { #define MAX_SG_ENTRY 255 struct mvs_prd_imt { +#ifndef __BIG_ENDIAN __le32 len:22; u8 _r_a:2; u8 misc_ctl:4; u8 inter_sel:4; +#else + u32 inter_sel:4; + u32 misc_ctl:4; + u32 _r_a:2; + u32 len:22; +#endif }; struct mvs_prd { /* 64-bit buffer address */ __le64 addr; /* 22-bit length */ - struct mvs_prd_imt im_len; + __le32 im_len; } __attribute__ ((packed)); /* |