diff options
| author | Andrew Vasquez <andrew.vasquez@qlogic.com> | 2005-11-08 14:37:06 -0800 |
|---|---|---|
| committer | James Bottomley <jejb@mulgrave.(none)> | 2005-11-09 16:17:25 -0500 |
| commit | dcb36ce9d9100eb821c6ea314b02f215cbdd8aca (patch) | |
| tree | ce088495c46bfb08410b9cecdacfeb5dde08e3fa /drivers/scsi/qla2xxx/qla_sup.c | |
| parent | 07ce5eba857cb7dc8f6ae39eda74b108efe4a3f8 (diff) | |
[SCSI] qla2xxx: Correct additional posting issues during NVRAM accesses.
On MMIO relaxed-order platforms, it is possible for the
proper delay during NVRAM access to begin before the request
passes through the PCI bus (via a MMIO write) to the ISP.
Thus, causing a subsequent read to the NVRAM part to fail.
Add a MMIO read, after the MMIO write to insure any posted
writes are flushed.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_sup.c')
| -rw-r--r-- | drivers/scsi/qla2xxx/qla_sup.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/scsi/qla2xxx/qla_sup.c b/drivers/scsi/qla2xxx/qla_sup.c index 4bec0b4fb6b..d54d2a99c3d 100644 --- a/drivers/scsi/qla2xxx/qla_sup.c +++ b/drivers/scsi/qla2xxx/qla_sup.c @@ -126,6 +126,7 @@ qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data) /* Wait for NVRAM to become ready */ WRT_REG_WORD(®->nvram, NVR_SELECT); + RD_REG_WORD(®->nvram); /* PCI Posting. */ do { NVRAM_DELAY(); word = RD_REG_WORD(®->nvram); @@ -178,6 +179,7 @@ qla2x00_write_nvram_word_tmo(scsi_qla_host_t *ha, uint32_t addr, uint16_t data, /* Wait for NVRAM to become ready */ WRT_REG_WORD(®->nvram, NVR_SELECT); + RD_REG_WORD(®->nvram); /* PCI Posting. */ do { NVRAM_DELAY(); word = RD_REG_WORD(®->nvram); @@ -235,6 +237,7 @@ qla2x00_nvram_request(scsi_qla_host_t *ha, uint32_t nv_cmd) /* Read data from NVRAM. */ for (cnt = 0; cnt < 16; cnt++) { WRT_REG_WORD(®->nvram, NVR_SELECT | NVR_CLOCK); + RD_REG_WORD(®->nvram); /* PCI Posting. */ NVRAM_DELAY(); data <<= 1; reg_data = RD_REG_WORD(®->nvram); @@ -337,6 +340,7 @@ qla2x00_clear_nvram_protection(scsi_qla_host_t *ha) /* Wait for NVRAM to become ready. */ WRT_REG_WORD(®->nvram, NVR_SELECT); + RD_REG_WORD(®->nvram); /* PCI Posting. */ do { NVRAM_DELAY(); word = RD_REG_WORD(®->nvram); @@ -388,6 +392,7 @@ qla2x00_set_nvram_protection(scsi_qla_host_t *ha, int stat) /* Wait for NVRAM to become ready. */ WRT_REG_WORD(®->nvram, NVR_SELECT); + RD_REG_WORD(®->nvram); /* PCI Posting. */ do { NVRAM_DELAY(); word = RD_REG_WORD(®->nvram); |