diff options
| author | Jeff Garzik <jeff@garzik.org> | 2006-03-21 22:14:17 -0500 |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2006-03-21 22:14:17 -0500 |
| commit | 55cca65e1995ad604ee87e22c76c17d5cbceb9d0 (patch) | |
| tree | 0a691ff7c1b9320e942e78f6f46bf65df5570d9f /drivers/scsi/sata_vsc.c | |
| parent | c962990a38167aacac91738501815deffa3afbd6 (diff) | |
[libata sata_vsc, sata_svw] Convert #define'd constants to enums
Also, bump sata_vsc version.
Diffstat (limited to 'drivers/scsi/sata_vsc.c')
| -rw-r--r-- | drivers/scsi/sata_vsc.c | 95 |
1 files changed, 49 insertions, 46 deletions
diff --git a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c index b7b6c807346..fbf0713f9ab 100644 --- a/drivers/scsi/sata_vsc.c +++ b/drivers/scsi/sata_vsc.c @@ -47,52 +47,55 @@ #include <linux/libata.h> #define DRV_NAME "sata_vsc" -#define DRV_VERSION "1.1" - -/* Interrupt register offsets (from chip base address) */ -#define VSC_SATA_INT_STAT_OFFSET 0x00 -#define VSC_SATA_INT_MASK_OFFSET 0x04 - -/* Taskfile registers offsets */ -#define VSC_SATA_TF_CMD_OFFSET 0x00 -#define VSC_SATA_TF_DATA_OFFSET 0x00 -#define VSC_SATA_TF_ERROR_OFFSET 0x04 -#define VSC_SATA_TF_FEATURE_OFFSET 0x06 -#define VSC_SATA_TF_NSECT_OFFSET 0x08 -#define VSC_SATA_TF_LBAL_OFFSET 0x0c -#define VSC_SATA_TF_LBAM_OFFSET 0x10 -#define VSC_SATA_TF_LBAH_OFFSET 0x14 -#define VSC_SATA_TF_DEVICE_OFFSET 0x18 -#define VSC_SATA_TF_STATUS_OFFSET 0x1c -#define VSC_SATA_TF_COMMAND_OFFSET 0x1d -#define VSC_SATA_TF_ALTSTATUS_OFFSET 0x28 -#define VSC_SATA_TF_CTL_OFFSET 0x29 - -/* DMA base */ -#define VSC_SATA_UP_DESCRIPTOR_OFFSET 0x64 -#define VSC_SATA_UP_DATA_BUFFER_OFFSET 0x6C -#define VSC_SATA_DMA_CMD_OFFSET 0x70 - -/* SCRs base */ -#define VSC_SATA_SCR_STATUS_OFFSET 0x100 -#define VSC_SATA_SCR_ERROR_OFFSET 0x104 -#define VSC_SATA_SCR_CONTROL_OFFSET 0x108 - -/* Port stride */ -#define VSC_SATA_PORT_OFFSET 0x200 - -/* Error interrupt status bit offsets */ -#define VSC_SATA_INT_ERROR_CRC 0x40 -#define VSC_SATA_INT_ERROR_T 0x20 -#define VSC_SATA_INT_ERROR_P 0x10 -#define VSC_SATA_INT_ERROR_R 0x8 -#define VSC_SATA_INT_ERROR_E 0x4 -#define VSC_SATA_INT_ERROR_M 0x2 -#define VSC_SATA_INT_PHY_CHANGE 0x1 -#define VSC_SATA_INT_ERROR (VSC_SATA_INT_ERROR_CRC | VSC_SATA_INT_ERROR_T | \ - VSC_SATA_INT_ERROR_P | VSC_SATA_INT_ERROR_R | \ - VSC_SATA_INT_ERROR_E | VSC_SATA_INT_ERROR_M | \ - VSC_SATA_INT_PHY_CHANGE) +#define DRV_VERSION "1.2" + +enum { + /* Interrupt register offsets (from chip base address) */ + VSC_SATA_INT_STAT_OFFSET = 0x00, + VSC_SATA_INT_MASK_OFFSET = 0x04, + + /* Taskfile registers offsets */ + VSC_SATA_TF_CMD_OFFSET = 0x00, + VSC_SATA_TF_DATA_OFFSET = 0x00, + VSC_SATA_TF_ERROR_OFFSET = 0x04, + VSC_SATA_TF_FEATURE_OFFSET = 0x06, + VSC_SATA_TF_NSECT_OFFSET = 0x08, + VSC_SATA_TF_LBAL_OFFSET = 0x0c, + VSC_SATA_TF_LBAM_OFFSET = 0x10, + VSC_SATA_TF_LBAH_OFFSET = 0x14, + VSC_SATA_TF_DEVICE_OFFSET = 0x18, + VSC_SATA_TF_STATUS_OFFSET = 0x1c, + VSC_SATA_TF_COMMAND_OFFSET = 0x1d, + VSC_SATA_TF_ALTSTATUS_OFFSET = 0x28, + VSC_SATA_TF_CTL_OFFSET = 0x29, + + /* DMA base */ + VSC_SATA_UP_DESCRIPTOR_OFFSET = 0x64, + VSC_SATA_UP_DATA_BUFFER_OFFSET = 0x6C, + VSC_SATA_DMA_CMD_OFFSET = 0x70, + + /* SCRs base */ + VSC_SATA_SCR_STATUS_OFFSET = 0x100, + VSC_SATA_SCR_ERROR_OFFSET = 0x104, + VSC_SATA_SCR_CONTROL_OFFSET = 0x108, + + /* Port stride */ + VSC_SATA_PORT_OFFSET = 0x200, + + /* Error interrupt status bit offsets */ + VSC_SATA_INT_ERROR_CRC = 0x40, + VSC_SATA_INT_ERROR_T = 0x20, + VSC_SATA_INT_ERROR_P = 0x10, + VSC_SATA_INT_ERROR_R = 0x8, + VSC_SATA_INT_ERROR_E = 0x4, + VSC_SATA_INT_ERROR_M = 0x2, + VSC_SATA_INT_PHY_CHANGE = 0x1, + VSC_SATA_INT_ERROR = (VSC_SATA_INT_ERROR_CRC | VSC_SATA_INT_ERROR_T | \ + VSC_SATA_INT_ERROR_P | VSC_SATA_INT_ERROR_R | \ + VSC_SATA_INT_ERROR_E | VSC_SATA_INT_ERROR_M | \ + VSC_SATA_INT_PHY_CHANGE), +}; + #define is_vsc_sata_int_err(port_idx, int_status) \ (int_status & (VSC_SATA_INT_ERROR << (8 * port_idx))) |