diff options
| author | Alan Cox <alan@lxorguk.ukuu.org.uk> | 2005-12-08 19:19:50 +0000 |
|---|---|---|
| committer | Jeff Garzik <jgarzik@pobox.com> | 2005-12-12 15:33:28 -0500 |
| commit | d96212ed87d032d2d830e265aae14038dc1f8ad8 (patch) | |
| tree | bdd824b0d842e55351ddb1da42da29c4889c4713 /drivers/scsi | |
| parent | fe79e683ccdb29c13b3e0d18507474b4e2d9aab6 (diff) | |
[PATCH] libata: add ata_piix notes
Ok lets start with the 'easy' stuff. This includes my research and
summary of chip errata into the new driver so that people can refer to
it when updating ata_piix.
No code changes
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers/scsi')
| -rw-r--r-- | drivers/scsi/ata_piix.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/drivers/scsi/ata_piix.c b/drivers/scsi/ata_piix.c index 887b2b9ee4a..908ff1f9671 100644 --- a/drivers/scsi/ata_piix.c +++ b/drivers/scsi/ata_piix.c @@ -37,6 +37,49 @@ * * Hardware documentation available at http://developer.intel.com/ * + * Documentation + * Publically available from Intel web site. Errata documentation + * is also publically available. As an aide to anyone hacking on this + * driver the list of errata that are relevant is below.going back to + * PIIX4. Older device documentation is now a bit tricky to find. + * + * The chipsets all follow very much the same design. The orginal Triton + * series chipsets do _not_ support independant device timings, but this + * is fixed in Triton II. With the odd mobile exception the chips then + * change little except in gaining more modes until SATA arrives. This + * driver supports only the chips with independant timing (that is those + * with SITRE and the 0x44 timing register). See pata_oldpiix and pata_mpiix + * for the early chip drivers. + * + * Errata of note: + * + * Unfixable + * PIIX4 errata #9 - Only on ultra obscure hw + * ICH3 errata #13 - Not observed to affect real hw + * by Intel + * + * Things we must deal with + * PIIX4 errata #10 - BM IDE hang with non UDMA + * (must stop/start dma to recover) + * 440MX errata #15 - As PIIX4 errata #10 + * PIIX4 errata #15 - Must not read control registers + * during a PIO transfer + * 440MX errata #13 - As PIIX4 errata #15 + * ICH2 errata #21 - DMA mode 0 doesn't work right + * ICH0/1 errata #55 - As ICH2 errata #21 + * ICH2 spec c #9 - Extra operations needed to handle + * drive hotswap [NOT YET SUPPORTED] + * ICH2 spec c #20 - IDE PRD must not cross a 64K boundary + * and must be dword aligned + * ICH2 spec c #24 - UDMA mode 4,5 t85/86 should be 6ns not 3.3 + * + * Should have been BIOS fixed: + * 450NX: errata #19 - DMA hangs on old 450NX + * 450NX: errata #20 - DMA hangs on old 450NX + * 450NX: errata #25 - Corruption with DMA on old 450NX + * ICH3 errata #15 - IDE deadlock under high load + * (BIOS must set dev 31 fn 0 bit 23) + * ICH3 errata #18 - Don't use native mode */ #include <linux/kernel.h> |