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authorZhiwu Song <zhiwu.song@csr.com>2012-02-13 17:45:38 +0800
committerGrant Likely <grant.likely@secretlab.ca>2012-03-09 14:51:11 -0700
commit1cc2df9d6f41b689dc9a562a22de87f860ce6be5 (patch)
tree72370e8093f8047cdc4b69a83d1e28c5f50e5b74 /drivers/spi/Makefile
parentde3bd7e6de25141c466773c2e0fa319b2fa93655 (diff)
SPI: add CSR SiRFprimaII SPI controller driver
CSR SiRFprimaII has two SPIs (SPI0 and SPI1). Features: * Master and slave modes * 8-/12-/16-/32-bit data unit * 256 bytes receive data FIFO and 256 bytes transmit data FIFO * Multi-unit frame * Configurable SPI_EN (chip select pin) active state * Configurable SPI_CLK polarity * Configurable SPI_CLK phase * Configurable MSB/LSB first Signed-off-by: Zhiwu Song <zhiwu.song@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/spi/Makefile')
-rw-r--r--drivers/spi/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index d9a7aed4ae9..2e556484345 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_SPI_SH) += spi-sh.o
obj-$(CONFIG_SPI_SH_HSPI) += spi-sh-hspi.o
obj-$(CONFIG_SPI_SH_MSIOF) += spi-sh-msiof.o
obj-$(CONFIG_SPI_SH_SCI) += spi-sh-sci.o
+obj-$(CONFIG_SPI_SIRF) += spi-sirf.o
obj-$(CONFIG_SPI_STMP3XXX) += spi-stmp.o
obj-$(CONFIG_SPI_TEGRA) += spi-tegra.o
obj-$(CONFIG_SPI_TI_SSP) += spi-ti-ssp.o