diff options
| author | H Hartley Sweeten <hartleys@visionengravers.com> | 2011-09-20 11:06:17 -0700 |
|---|---|---|
| committer | Grant Likely <grant.likely@secretlab.ca> | 2011-09-21 09:41:48 -0600 |
| commit | 7eb187b3cd3f6f285d91a196dbefac9b6adbb07c (patch) | |
| tree | 2086865907f57e441d15ad16bd8bbdd07c29091a /drivers/spi/spi-dw-mid.c | |
| parent | 3e3ea716270dc64810f624ad6a3672440b45d3d4 (diff) | |
spi: spi-dw: fix all sparse warnings
The dw_{read,write}[lw] macros produce sparse warnings everytime they
are used. The "read" ones cause:
warning: cast removes address space of expression
warning: incorrect type in argument 1 (different address spaces)
expected void const volatile [noderef] <asn:2>*addr
got unsigned int *<noident>
And the "write" ones:
warning: cast removes address space of expression
warning: incorrect type in argument 2 (different address spaces)
expected void volatile [noderef] <asn:2>*addr
got unsigned int *<noident>
Fix this by removing struct dw_spi_reg and converting all the register
offsets to #defines. Then convert the macros into inlined functions so
that proper type checking can occur.
While here, also fix the three sparse warnings in spi-dw-mid.c due to
the return value of ioremap_nocache being stored in a u32 * not a
void __iomem *.
With these changes the spi-dw* files all build with no sparse warnings.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/spi/spi-dw-mid.c')
| -rw-r--r-- | drivers/spi/spi-dw-mid.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c index 130e55537db..e743a45ee92 100644 --- a/drivers/spi/spi-dw-mid.c +++ b/drivers/spi/spi-dw-mid.c @@ -116,13 +116,13 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change) /* 1. setup DMA related registers */ if (cs_change) { spi_enable_chip(dws, 0); - dw_writew(dws, dmardlr, 0xf); - dw_writew(dws, dmatdlr, 0x10); + dw_writew(dws, DW_SPI_DMARDLR, 0xf); + dw_writew(dws, DW_SPI_DMATDLR, 0x10); if (dws->tx_dma) dma_ctrl |= 0x2; if (dws->rx_dma) dma_ctrl |= 0x1; - dw_writew(dws, dmacr, dma_ctrl); + dw_writew(dws, DW_SPI_DMACR, dma_ctrl); spi_enable_chip(dws, 1); } @@ -200,7 +200,8 @@ static struct dw_spi_dma_ops mid_dma_ops = { int dw_spi_mid_init(struct dw_spi *dws) { - u32 *clk_reg, clk_cdiv; + void __iomem *clk_reg; + u32 clk_cdiv; clk_reg = ioremap_nocache(MRST_CLK_SPI0_REG, 16); if (!clk_reg) |