diff options
| author | Daniel Mack <daniel@caiaq.de> | 2009-11-19 19:01:42 +0000 |
|---|---|---|
| committer | Grant Likely <grant.likely@secretlab.ca> | 2009-12-08 18:48:16 -0700 |
| commit | ce1807b2e527979bd77d8a1a1768a6365f3febb5 (patch) | |
| tree | 2bbf8ecbf000083f147fab885bdb91894c56186a /drivers/spi | |
| parent | d33c861e71c57dd69d39d88b84a672adf86a2144 (diff) | |
spi/i.mx: drain MXC SPI transfer buffer when probing device
On the MX31litekit, the bootloader seems to communicate with the MC13783
PMIC chip before booting Linux. However, it does not flush all the
buffers properly after that, which makes the imx-spi driver read
bogus data when probing the MC13783.
Fix that by draining the SPI receive buffer on startup.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/spi_imx.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c index 89c22efedfb..1b17f443dee 100644 --- a/drivers/spi/spi_imx.c +++ b/drivers/spi/spi_imx.c @@ -44,6 +44,9 @@ #define MXC_CSPIINT 0x0c #define MXC_RESET 0x1c +#define MX3_CSPISTAT 0x14 +#define MX3_CSPISTAT_RR (1 << 3) + /* generic defines to abstract from the different register layouts */ #define MXC_INT_RR (1 << 0) /* Receive data ready interrupt */ #define MXC_INT_TE (1 << 1) /* Transmit FIFO empty interrupt */ @@ -593,6 +596,11 @@ static int __init spi_imx_probe(struct platform_device *pdev) if (!cpu_is_mx31() || !cpu_is_mx35()) writel(1, spi_imx->base + MXC_RESET); + /* drain receive buffer */ + if (cpu_is_mx31() || cpu_is_mx35()) + while (readl(spi_imx->base + MX3_CSPISTAT) & MX3_CSPISTAT_RR) + readl(spi_imx->base + MXC_CSPIRXDATA); + spi_imx->intctrl(spi_imx, 0); ret = spi_bitbang_start(&spi_imx->bitbang); |