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authorLaxman Dewangan <ldewangan@nvidia.com>2013-01-08 16:27:44 +0530
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-01-15 22:15:17 -0800
commite9ea096dd2259454e0d09d0b0445fe8f0117add4 (patch)
tree7feeb18200f00e0a9c7f6deba1aa04a801914d61 /drivers/tty/serial/Kconfig
parent42d34191545be343909417dd05db799686f2e48e (diff)
serial: tegra: add serial driver
NVIDIA's Tegra has multiple UART controller which supports: - APB DMA based controller fifo read/write. - End Of Data interrupt in incoming data to know whether end of frame achieve or not. - HW controlled RTS and CTS flow control to reduce SW overhead. Add serial driver to use all above feature. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Alan Cox <alan@linux.intel.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/Kconfig')
-rw-r--r--drivers/tty/serial/Kconfig11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 59c23d03810..aff3cd35666 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -269,6 +269,17 @@ config SERIAL_SIRFSOC_CONSOLE
your boot loader about how to pass options to the kernel at
boot time.)
+config SERIAL_TEGRA
+ tristate "NVIDIA Tegra20/30 SoC serial controller"
+ depends on ARCH_TEGRA && TEGRA20_APB_DMA
+ select SERIAL_CORE
+ help
+ Support for the on-chip UARTs on the NVIDIA Tegra series SOCs
+ providing /dev/ttyHS0, 1, 2, 3 and 4 (note, some machines may not
+ provide all of these ports, depending on how the serial port
+ are enabled). This driver uses the APB DMA to achieve higher baudrate
+ and better performance.
+
config SERIAL_MAX3100
tristate "MAX3100 support"
depends on SPI