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authorRajendra Nayak <rnayak@ti.com>2011-12-14 17:25:44 +0530
committerTony Lindgren <tony@atomide.com>2011-12-16 14:10:55 -0800
commit8fe789dc375a1929bf64a9b982140cf394c8bce5 (patch)
treee64b153b1cc212d4eee2ec8ba221b8eb0c01c1ad /drivers/tty
parentba77433da6e48062825169ae41d8efe7c183c3db (diff)
omap-serial: Use default clock speed (48Mhz) if not specified
Use a default clock speed of 48Mhz, instead of ending up with 0, if platforms fail to specify a valid clock speed. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'drivers/tty')
-rw-r--r--drivers/tty/serial/omap-serial.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 1baf24b9646..c5b545f19a1 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -43,6 +43,8 @@
#include <plat/dmtimer.h>
#include <plat/omap-serial.h>
+#define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/
+
static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
/* Forward declaration of functions */
@@ -1387,6 +1389,11 @@ static int serial_omap_probe(struct platform_device *pdev)
up->port.flags = omap_up_info->flags;
up->port.uartclk = omap_up_info->uartclk;
+ if (!up->port.uartclk) {
+ up->port.uartclk = DEFAULT_CLK_SPEED;
+ dev_warn(&pdev->dev, "No clock speed specified: using default:"
+ "%d\n", DEFAULT_CLK_SPEED);
+ }
up->uart_dma.uart_base = mem->start;
up->errata = omap_up_info->errata;