diff options
| author | Felipe Balbi <balbi@ti.com> | 2012-03-23 12:20:31 +0200 |
|---|---|---|
| committer | Felipe Balbi <balbi@ti.com> | 2012-04-11 13:12:17 +0300 |
| commit | 07e7f47b6d8da3e290f90615c9a74dff0115709e (patch) | |
| tree | f30921a337ef1a36fdd6fba5b1d17e79073637ba /drivers/usb/dwc3/gadget.c | |
| parent | 1522d7034d739f2d348f4c544fe12ff9627c36a4 (diff) | |
usb: dwc3: workaround: metastability state on Run/Stop bit
All revisions prior to 2.20a have a known issue which
causes metastability state on Run/Stop bit if we
configure the core to work on any of the USB2-only
speeds.
The suggested workaround is just to never configure the
core to anything other than SuperSpeed.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/dwc3/gadget.c')
| -rw-r--r-- | drivers/usb/dwc3/gadget.c | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 5255fe975ea..dda56b8f861 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1356,7 +1356,24 @@ static int dwc3_gadget_start(struct usb_gadget *g, reg = dwc3_readl(dwc->regs, DWC3_DCFG); reg &= ~(DWC3_DCFG_SPEED_MASK); - reg |= dwc->maximum_speed; + + /** + * WORKAROUND: DWC3 revision < 2.20a have an issue + * which would cause metastability state on Run/Stop + * bit if we try to force the IP to USB2-only mode. + * + * Because of that, we cannot configure the IP to any + * speed other than the SuperSpeed + * + * Refers to: + * + * STAR#9000525659: Clock Domain Crossing on DCTL in + * USB 2.0 Mode + */ + if (dwc->revision < DWC3_REVISION_220A) + reg |= DWC3_DCFG_SUPERSPEED; + else + reg |= dwc->maximum_speed; dwc3_writel(dwc->regs, DWC3_DCFG, reg); dwc->start_config_issued = false; |