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authorAnatolij Gustschin <agust@denx.de>2011-04-18 22:01:58 +0200
committerGreg Kroah-Hartman <gregkh@suse.de>2011-05-02 16:59:37 -0700
commit2ea6698d7b9266da53044dddc5f6743adf097fb5 (patch)
tree73dc8d286faf7c6cc25a18843825d796c0138f5b /drivers/usb/otg
parent09ba0def9aefc16c1c8a6d166f024c9d704f0ab0 (diff)
USB: fsl_udc_core: support device mode of MPC5121E DR USB Controller
Extend the FSL UDC driver to support MPC5121E DR USB Controller operation in device mode. Add MPC5121E specific init/uninit at probe and remove and isolate system interface register accesses when running on MPC5121E SoC, as these registers are not available on this platform. This patch relies on previous patch for supporting big endian registers and descriptors access in the FSL UDC driver. Additionally support endpoint FIFO status operation by providing appropriate callback in endpoint ops structure. Also flush cache for the req buffer used for GetStatus reply. Without this, the correct reply to an endpoint GetStatus is written to 'req', but doesn't make it out to the USB bus since the buffer hasn't been flushed. This would cause the USBCV Halt Endpoint test to fail (according to changelog in Freescale LTIB driver code). Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Li Yang <leoli@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/otg')
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