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author | Hiroshi DOYU <hdoyu@nvidia.com> | 2011-11-17 07:31:31 +0200 |
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committer | Joerg Roedel <joerg.roedel@amd.com> | 2012-01-26 13:59:02 +0100 |
commit | 7a31f6f48bb6e37b3195fcecd69d30740f6b0036 (patch) | |
tree | 8f917ff520e78eaa7a0e4ebadfaacdfa7bccf54b /drivers/uwb/allocator.c | |
parent | d53e54b4d43b2559c5a424188894fd63d145b5d7 (diff) |
ARM: IOMMU: Tegra30: Add iommu_ops for SMMU driver
Tegra 30 IOMMU H/W, SMMU (System Memory Management Unit). This patch
implements struct iommu_ops for SMMU for the upper IOMMU API.
This H/W module supports multiple virtual address spaces(domain x4),
and manages 2 level H/W translation pagetable.
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'drivers/uwb/allocator.c')
0 files changed, 0 insertions, 0 deletions