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| author | Sean Paul <seanpaul@chromium.org> | 2012-10-31 23:21:00 +0000 |
|---|---|---|
| committer | Jingoo Han <jg1.han@samsung.com> | 2012-11-29 10:33:27 +0900 |
| commit | 49ce41f38b307d00cbcbc76721e0db2208915b44 (patch) | |
| tree | 9c8e36f221802fd50615081404f734be169de9b3 /drivers/video/exynos/exynos_dp_reg.c | |
| parent | fadec4b7e59e3a89c43dcba1c9812a9f99d2a61a (diff) | |
video: exynos_dp: Get pll lock before pattern set
According to the exynos datasheet (Figure 49-10), we should wait for PLL
lock before programming the training pattern when doing software eDP
link training.
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Diffstat (limited to 'drivers/video/exynos/exynos_dp_reg.c')
0 files changed, 0 insertions, 0 deletions