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authorTomi Valkeinen <tomi.valkeinen@ti.com>2013-06-12 09:44:52 +0300
committerTomi Valkeinen <tomi.valkeinen@ti.com>2013-06-26 15:56:06 +0300
commit72e5512ade915862035679ca51c4645c7fb5f1ca (patch)
tree7ae7ea80b461a5a9c6fd0a8561de742330b01cba /drivers/video/omap2/dss
parentf5725af59c7dfd00809eb08ad5602b1fba58bc0f (diff)
OMAPDSS: DPI: Fix wrong pixel clock limit
DPI is supposed to skip odd dividers in the clock path when the pixel clock is higher than 100MHz. The code, however, defines the pixel clock limit as 1MHz. This causes the driver to skip valid clock dividers, possibly making the pixel clock to be further away from the requested one than necessary. Fix the clock limit to 100MHz. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: NeilBrown <neilb@suse.de>
Diffstat (limited to 'drivers/video/omap2/dss')
-rw-r--r--drivers/video/omap2/dss/dpi.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c
index 757b57f7275..0bdcd419217 100644
--- a/drivers/video/omap2/dss/dpi.c
+++ b/drivers/video/omap2/dss/dpi.c
@@ -129,7 +129,7 @@ static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
* shifted. So skip all odd dividers when the pixel clock is on the
* higher side.
*/
- if (ctx->pck_min >= 1000000) {
+ if (ctx->pck_min >= 100000000) {
if (lckd > 1 && lckd % 2 != 0)
return false;
@@ -156,7 +156,7 @@ static bool dpi_calc_hsdiv_cb(int regm_dispc, unsigned long dispc,
* shifted. So skip all odd dividers when the pixel clock is on the
* higher side.
*/
- if (regm_dispc > 1 && regm_dispc % 2 != 0 && ctx->pck_min >= 1000000)
+ if (regm_dispc > 1 && regm_dispc % 2 != 0 && ctx->pck_min >= 100000000)
return false;
ctx->dsi_cinfo.regm_dispc = regm_dispc;