diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-05 09:03:46 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-05 09:03:46 -0700 |
commit | cdd854bc42b5e6c79bbbc40c6600d995ffe6e747 (patch) | |
tree | 18c4dcc07bbb8aeb2b23bc812cd60cc293f36cd8 /drivers/video | |
parent | bbc4fd12a635492ad9d12bb418124fa2d5f0d734 (diff) | |
parent | 42a0ae2282b512d1a8f6f020327f5f7b8f31a5ea (diff) |
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (79 commits)
powerpc/8xx: Add support for the MPC8xx based boards from TQC
powerpc/85xx: Introduce support for the Freescale P1022DS reference board
powerpc/85xx: Adding DTS for the STx GP3-SSA MPC8555 board
powerpc/85xx: Change deprecated binding for 85xx-based boards
powerpc/tqm85xx: add a quirk for ti1520 PCMCIA bridge
powerpc/tqm85xx: update PCI interrupt-map attribute
powerpc/mpc8308rdb: support for MPC8308RDB board from Freescale
powerpc/fsl_pci: add quirk for mpc8308 pcie bridge
powerpc/85xx: Cleanup QE initialization for MPC85xxMDS boards
powerpc/85xx: Fix booting for P1021MDS boards
powerpc/85xx: Fix SWIOTLB initalization for MPC85xxMDS boards
powerpc/85xx: kexec for SMP 85xx BookE systems
powerpc/5200/i2c: improve i2c bus error recovery
of/xilinxfb: update tft compatible versions
powerpc/fsl-diu-fb: Support setting display mode using EDID
powerpc/5121: doc/dts-bindings: update doc of FSL DIU bindings
powerpc/5121: shared DIU framebuffer support
powerpc/5121: move fsl-diu-fb.h to include/linux
powerpc/5121: fsl-diu-fb: fix issue with re-enabling DIU area descriptor
powerpc/512x: add clock structure for Video-IN (VIU) unit
...
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/Kconfig | 1 | ||||
-rw-r--r-- | drivers/video/fsl-diu-fb.c | 137 | ||||
-rw-r--r-- | drivers/video/fsl-diu-fb.h | 223 | ||||
-rw-r--r-- | drivers/video/xilinxfb.c | 2 |
4 files changed, 116 insertions, 247 deletions
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 9e711a1d0d9..7b11ea68c80 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -1871,6 +1871,7 @@ config FB_MBX_DEBUG config FB_FSL_DIU tristate "Freescale DIU framebuffer support" depends on FB && FSL_SOC + select FB_MODE_HELPERS select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c index 27455ce298b..e38ad222454 100644 --- a/drivers/video/fsl-diu-fb.c +++ b/drivers/video/fsl-diu-fb.c @@ -34,7 +34,8 @@ #include <linux/of_platform.h> #include <sysdev/fsl_soc.h> -#include "fsl-diu-fb.h" +#include <linux/fsl-diu-fb.h> +#include "edid.h" /* * These parameters give default parameters @@ -217,6 +218,7 @@ struct mfb_info { int x_aoi_d; /* aoi display x offset to physical screen */ int y_aoi_d; /* aoi display y offset to physical screen */ struct fsl_diu_data *parent; + u8 *edid_data; }; @@ -317,6 +319,17 @@ static void fsl_diu_free(void *virt, size_t size) free_pages_exact(virt, size); } +/* + * Workaround for failed writing desc register of planes. + * Needed with MPC5121 DIU rev 2.0 silicon. + */ +void wr_reg_wa(u32 *reg, u32 val) +{ + do { + out_be32(reg, val); + } while (in_be32(reg) != val); +} + static int fsl_diu_enable_panel(struct fb_info *info) { struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par; @@ -330,7 +343,7 @@ static int fsl_diu_enable_panel(struct fb_info *info) switch (mfbi->index) { case 0: /* plane 0 */ if (hw->desc[0] != ad->paddr) - out_be32(&hw->desc[0], ad->paddr); + wr_reg_wa(&hw->desc[0], ad->paddr); break; case 1: /* plane 1 AOI 0 */ cmfbi = machine_data->fsl_diu_info[2]->par; @@ -340,7 +353,7 @@ static int fsl_diu_enable_panel(struct fb_info *info) cpu_to_le32(cmfbi->ad->paddr); else ad->next_ad = 0; - out_be32(&hw->desc[1], ad->paddr); + wr_reg_wa(&hw->desc[1], ad->paddr); } break; case 3: /* plane 2 AOI 0 */ @@ -351,14 +364,14 @@ static int fsl_diu_enable_panel(struct fb_info *info) cpu_to_le32(cmfbi->ad->paddr); else ad->next_ad = 0; - out_be32(&hw->desc[2], ad->paddr); + wr_reg_wa(&hw->desc[2], ad->paddr); } break; case 2: /* plane 1 AOI 1 */ pmfbi = machine_data->fsl_diu_info[1]->par; ad->next_ad = 0; if (hw->desc[1] == machine_data->dummy_ad->paddr) - out_be32(&hw->desc[1], ad->paddr); + wr_reg_wa(&hw->desc[1], ad->paddr); else /* AOI0 open */ pmfbi->ad->next_ad = cpu_to_le32(ad->paddr); break; @@ -366,7 +379,7 @@ static int fsl_diu_enable_panel(struct fb_info *info) pmfbi = machine_data->fsl_diu_info[3]->par; ad->next_ad = 0; if (hw->desc[2] == machine_data->dummy_ad->paddr) - out_be32(&hw->desc[2], ad->paddr); + wr_reg_wa(&hw->desc[2], ad->paddr); else /* AOI0 was open */ pmfbi->ad->next_ad = cpu_to_le32(ad->paddr); break; @@ -390,27 +403,24 @@ static int fsl_diu_disable_panel(struct fb_info *info) switch (mfbi->index) { case 0: /* plane 0 */ if (hw->desc[0] != machine_data->dummy_ad->paddr) - out_be32(&hw->desc[0], - machine_data->dummy_ad->paddr); + wr_reg_wa(&hw->desc[0], machine_data->dummy_ad->paddr); break; case 1: /* plane 1 AOI 0 */ cmfbi = machine_data->fsl_diu_info[2]->par; if (cmfbi->count > 0) /* AOI1 is open */ - out_be32(&hw->desc[1], cmfbi->ad->paddr); + wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr); /* move AOI1 to the first */ else /* AOI1 was closed */ - out_be32(&hw->desc[1], - machine_data->dummy_ad->paddr); + wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr); /* close AOI 0 */ break; case 3: /* plane 2 AOI 0 */ cmfbi = machine_data->fsl_diu_info[4]->par; if (cmfbi->count > 0) /* AOI1 is open */ - out_be32(&hw->desc[2], cmfbi->ad->paddr); + wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr); /* move AOI1 to the first */ else /* AOI1 was closed */ - out_be32(&hw->desc[2], - machine_data->dummy_ad->paddr); + wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr); /* close AOI 0 */ break; case 2: /* plane 1 AOI 1 */ @@ -421,7 +431,7 @@ static int fsl_diu_disable_panel(struct fb_info *info) /* AOI0 is open, must be the first */ pmfbi->ad->next_ad = 0; } else /* AOI1 is the first in the chain */ - out_be32(&hw->desc[1], machine_data->dummy_ad->paddr); + wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr); /* close AOI 1 */ break; case 4: /* plane 2 AOI 1 */ @@ -432,7 +442,7 @@ static int fsl_diu_disable_panel(struct fb_info *info) /* AOI0 is open, must be the first */ pmfbi->ad->next_ad = 0; } else /* AOI1 is the first in the chain */ - out_be32(&hw->desc[2], machine_data->dummy_ad->paddr); + wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr); /* close AOI 1 */ break; default: @@ -1100,6 +1110,10 @@ static int fsl_diu_open(struct fb_info *info, int user) struct mfb_info *mfbi = info->par; int res = 0; + /* free boot splash memory on first /dev/fb0 open */ + if (!mfbi->index && diu_ops.release_bootmem) + diu_ops.release_bootmem(); + spin_lock(&diu_lock); mfbi->count++; if (mfbi->count == 1) { @@ -1173,18 +1187,30 @@ static int __devinit install_fb(struct fb_info *info) int rc; struct mfb_info *mfbi = info->par; const char *aoi_mode, *init_aoi_mode = "320x240"; + struct fb_videomode *db = fsl_diu_mode_db; + unsigned int dbsize = ARRAY_SIZE(fsl_diu_mode_db); + int has_default_mode = 1; if (init_fbinfo(info)) return -EINVAL; - if (mfbi->index == 0) /* plane 0 */ + if (mfbi->index == 0) { /* plane 0 */ + if (mfbi->edid_data) { + /* Now build modedb from EDID */ + fb_edid_to_monspecs(mfbi->edid_data, &info->monspecs); + fb_videomode_to_modelist(info->monspecs.modedb, + info->monspecs.modedb_len, + &info->modelist); + db = info->monspecs.modedb; + dbsize = info->monspecs.modedb_len; + } aoi_mode = fb_mode; - else + } else { aoi_mode = init_aoi_mode; + } pr_debug("mode used = %s\n", aoi_mode); - rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db, - ARRAY_SIZE(fsl_diu_mode_db), &fsl_diu_default_mode, default_bpp); - + rc = fb_find_mode(&info->var, info, aoi_mode, db, dbsize, + &fsl_diu_default_mode, default_bpp); switch (rc) { case 1: pr_debug("using mode specified in @mode\n"); @@ -1202,10 +1228,50 @@ static int __devinit install_fb(struct fb_info *info) default: pr_debug("rc = %d\n", rc); pr_debug("failed to find mode\n"); - return -EINVAL; + /* + * For plane 0 we continue and look into + * driver's internal modedb. + */ + if (mfbi->index == 0 && mfbi->edid_data) + has_default_mode = 0; + else + return -EINVAL; break; } + if (!has_default_mode) { + rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db, + ARRAY_SIZE(fsl_diu_mode_db), + &fsl_diu_default_mode, + default_bpp); + if (rc > 0 && rc < 5) + has_default_mode = 1; + } + + /* Still not found, use preferred mode from database if any */ + if (!has_default_mode && info->monspecs.modedb) { + struct fb_monspecs *specs = &info->monspecs; + struct fb_videomode *modedb = &specs->modedb[0]; + + /* + * Get preferred timing. If not found, + * first mode in database will be used. + */ + if (specs->misc & FB_MISC_1ST_DETAIL) { + int i; + + for (i = 0; i < specs->modedb_len; i++) { + if (specs->modedb[i].flag & FB_MODE_IS_FIRST) { + modedb = &specs->modedb[i]; + break; + } + } + } + + info->var.bits_per_pixel = default_bpp; + fb_videomode_to_var(&info->var, modedb); + } + pr_debug("xres_virtual %d\n", info->var.xres_virtual); pr_debug("bits_per_pixel %d\n", info->var.bits_per_pixel); @@ -1244,6 +1310,9 @@ static void uninstall_fb(struct fb_info *info) if (!mfbi->registered) return; + if (mfbi->index == 0) + kfree(mfbi->edid_data); + unregister_framebuffer(info); unmap_video_memory(info); if (&info->cmap) @@ -1427,6 +1496,7 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev, int ret, i, error = 0; struct resource res; struct fsl_diu_data *machine_data; + int diu_mode; machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL); if (!machine_data) @@ -1443,6 +1513,17 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev, mfbi = machine_data->fsl_diu_info[i]->par; memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info)); mfbi->parent = machine_data; + + if (mfbi->index == 0) { + const u8 *prop; + int len; + + /* Get EDID */ + prop = of_get_property(np, "edid", &len); + if (prop && len == EDID_LENGTH) + mfbi->edid_data = kmemdup(prop, EDID_LENGTH, + GFP_KERNEL); + } } ret = of_address_to_resource(np, 0, &res); @@ -1463,7 +1544,9 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev, goto error2; } - out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU anyway*/ + diu_mode = in_be32(&dr.diu_reg->diu_mode); + if (diu_mode != MFB_MODE1) + out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU */ /* Get the IRQ of the DIU */ machine_data->irq = irq_of_parse_and_map(np, 0); @@ -1511,7 +1594,13 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev, machine_data->dummy_ad->offset_xyd = 0; machine_data->dummy_ad->next_ad = 0; - out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr); + /* + * Let DIU display splash screen if it was pre-initialized + * by the bootloader, set dummy area descriptor otherwise. + */ + if (diu_mode != MFB_MODE1) + out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr); + out_be32(&dr.diu_reg->desc[1], machine_data->dummy_ad->paddr); out_be32(&dr.diu_reg->desc[2], machine_data->dummy_ad->paddr); diff --git a/drivers/video/fsl-diu-fb.h b/drivers/video/fsl-diu-fb.h deleted file mode 100644 index fc295d7ea46..00000000000 --- a/drivers/video/fsl-diu-fb.h +++ /dev/null @@ -1,223 +0,0 @@ -/* - * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. - * - * Freescale DIU Frame Buffer device driver - * - * Authors: Hongjun Chen <hong-jun.chen@freescale.com> - * Paul Widmer <paul.widmer@freescale.com> - * Srikanth Srinivasan <srikanth.srinivasan@freescale.com> - * York Sun <yorksun@freescale.com> - * - * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#ifndef __FSL_DIU_FB_H__ -#define __FSL_DIU_FB_H__ - -/* Arbitrary threshold to determine the allocation method - * See mpc8610fb_set_par(), map_video_memory(), and unmap_video_memory() - */ -#define MEM_ALLOC_THRESHOLD (1024*768*4+32) -/* Minimum value that the pixel clock can be set to in pico seconds - * This is determined by platform clock/3 where the minimum platform - * clock is 533MHz. This gives 5629 pico seconds. - */ -#define MIN_PIX_CLK 5629 -#define MAX_PIX_CLK 96096 - -#include <linux/types.h> - -struct mfb_alpha { - int enable; - int alpha; -}; - -struct mfb_chroma_key { - int enable; - __u8 red_max; - __u8 green_max; - __u8 blue_max; - __u8 red_min; - __u8 green_min; - __u8 blue_min; -}; - -struct aoi_display_offset { - int x_aoi_d; - int y_aoi_d; -}; - -#define MFB_SET_CHROMA_KEY _IOW('M', 1, struct mfb_chroma_key) -#define MFB_WAIT_FOR_VSYNC _IOW('F', 0x20, u_int32_t) -#define MFB_SET_BRIGHTNESS _IOW('M', 3, __u8) - -#define MFB_SET_ALPHA 0x80014d00 -#define MFB_GET_ALPHA 0x40014d00 -#define MFB_SET_AOID 0x80084d04 -#define MFB_GET_AOID 0x40084d04 -#define MFB_SET_PIXFMT 0x80014d08 -#define MFB_GET_PIXFMT 0x40014d08 - -#define FBIOGET_GWINFO 0x46E0 -#define FBIOPUT_GWINFO 0x46E1 - -#ifdef __KERNEL__ -#include <linux/spinlock.h> - -/* - * These are the fields of area descriptor(in DDR memory) for every plane - */ -struct diu_ad { - /* Word 0(32-bit) in DDR memory */ -/* __u16 comp; */ -/* __u16 pixel_s:2; */ -/* __u16 pallete:1; */ -/* __u16 red_c:2; */ -/* __u16 green_c:2; */ -/* __u16 blue_c:2; */ -/* __u16 alpha_c:3; */ -/* __u16 byte_f:1; */ -/* __u16 res0:3; */ - - __be32 pix_fmt; /* hard coding pixel format */ - - /* Word 1(32-bit) in DDR memory */ - __le32 addr; - - /* Word 2(32-bit) in DDR memory */ -/* __u32 delta_xs:11; */ -/* __u32 res1:1; */ -/* __u32 delta_ys:11; */ -/* __u32 res2:1; */ -/* __u32 g_alpha:8; */ - __le32 src_size_g_alpha; - - /* Word 3(32-bit) in DDR memory */ -/* __u32 delta_xi:11; */ -/* __u32 res3:5; */ -/* __u32 delta_yi:11; */ -/* __u32 res4:3; */ -/* __u32 flip:2; */ - __le32 aoi_size; - - /* Word 4(32-bit) in DDR memory */ - /*__u32 offset_xi:11; - __u32 res5:5; - __u32 offset_yi:11; - __u32 res6:5; - */ - __le32 offset_xyi; - - /* Word 5(32-bit) in DDR memory */ - /*__u32 offset_xd:11; - __u32 res7:5; - __u32 offset_yd:11; - __u32 res8:5; */ - __le32 offset_xyd; - - - /* Word 6(32-bit) in DDR memory */ - __u8 ckmax_r; - __u8 ckmax_g; - __u8 ckmax_b; - __u8 res9; - - /* Word 7(32-bit) in DDR memory */ - __u8 ckmin_r; - __u8 ckmin_g; - __u8 ckmin_b; - __u8 res10; -/* __u32 res10:8; */ - - /* Word 8(32-bit) in DDR memory */ - __le32 next_ad; - - /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */ - __u32 paddr; -} __attribute__ ((packed)); - -/* DIU register map */ -struct diu { - __be32 desc[3]; - __be32 gamma; - __be32 pallete; - __be32 cursor; - __be32 curs_pos; - __be32 diu_mode; - __be32 bgnd; - __be32 bgnd_wb; - __be32 disp_size; - __be32 wb_size; - __be32 wb_mem_addr; - __be32 hsyn_para; - __be32 vsyn_para; - __be32 syn_pol; - __be32 thresholds; - __be32 int_status; - __be32 int_mask; - __be32 colorbar[8]; - __be32 filling; - __be32 plut; -} __attribute__ ((packed)); - -struct diu_hw { - struct diu *diu_reg; - spinlock_t reg_lock; - - __u32 mode; /* DIU operation mode */ -}; - -struct diu_addr { - __u8 __iomem *vaddr; /* Virtual address */ - dma_addr_t paddr; /* Physical address */ - __u32 offset; -}; - -struct diu_pool { - struct diu_addr ad; - struct diu_addr gamma; - struct diu_addr pallete; - struct diu_addr cursor; -}; - -#define FSL_DIU_BASE_OFFSET 0x2C000 /* Offset of DIU */ -#define INT_LCDC 64 /* DIU interrupt number */ - -#define FSL_AOI_NUM 6 /* 5 AOIs and one dummy AOI */ - /* 1 for plane 0, 2 for plane 1&2 each */ - -/* Minimum X and Y resolutions */ -#define MIN_XRES 64 -#define MIN_YRES 64 - -/* HW cursor parameters */ -#define MAX_CURS 32 - -/* Modes of operation of DIU */ -#define MFB_MODE0 0 /* DIU off */ -#define MFB_MODE1 1 /* All three planes output to display */ -#define MFB_MODE2 2 /* Plane 1 to display, planes 2+3 written back*/ -#define MFB_MODE3 3 /* All three planes written back to memory */ -#define MFB_MODE4 4 /* Color bar generation */ - -/* INT_STATUS/INT_MASK field descriptions */ -#define INT_VSYNC 0x01 /* Vsync interrupt */ -#define INT_VSYNC_WB 0x02 /* Vsync interrupt for write back operation */ -#define INT_UNDRUN 0x04 /* Under run exception interrupt */ -#define INT_PARERR 0x08 /* Display parameters error interrupt */ -#define INT_LS_BF_VS 0x10 /* Lines before vsync. interrupt */ - -/* Panels'operation modes */ -#define MFB_TYPE_OUTPUT 0 /* Panel output to display */ -#define MFB_TYPE_OFF 1 /* Panel off */ -#define MFB_TYPE_WB 2 /* Panel written back to memory */ -#define MFB_TYPE_TEST 3 /* Panel generate color bar */ - -#endif /* __KERNEL__ */ -#endif /* __FSL_DIU_FB_H__ */ diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c index 574dc54e12d..29b5daacc21 100644 --- a/drivers/video/xilinxfb.c +++ b/drivers/video/xilinxfb.c @@ -485,6 +485,8 @@ static int __devexit xilinxfb_of_remove(struct of_device *op) /* Match table for of_platform binding */ static struct of_device_id xilinxfb_of_match[] __devinitdata = { { .compatible = "xlnx,xps-tft-1.00.a", }, + { .compatible = "xlnx,xps-tft-2.00.a", }, + { .compatible = "xlnx,xps-tft-2.01.a", }, { .compatible = "xlnx,plb-tft-cntlr-ref-1.00.a", }, { .compatible = "xlnx,plb-dvi-cntlr-ref-1.00.c", }, {}, |