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author | Chon Ming Lee <chon.ming.lee@intel.com> | 2013-09-27 15:31:00 +0800 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-10-01 07:45:41 +0200 |
commit | 24eb2d599b6a2bf7761c00e1959898d1d9240cb5 (patch) | |
tree | aa1dde4aac8985152c7c588457f5148862b071e0 /drivers/xen/xen-acpi-pad.c | |
parent | afc85b9d9e617e602006d8766d04e0b8ac9c1b74 (diff) |
drm/i915: Program GMBUS Frequency based on the CDCLK for VLV.
CDCLK is used to generate the gmbus clock. This is normally done by
BIOS. Program the value if the BIOS-less system doesn't do it.
v2: Move this to intel_i2c_reset to allow reprogram the gmbus frequency
during resume. (Daniel)
v3: Change GMBUS_FREQ to GMBUSFREQ_VLV, and use VLV_DISPLAY_BASE.
(Ville).
Remove cdclk_ratio[] table, and calculate the cdclk ratio instead.
(Ville).
Change the shift then mask for reg read, to mask first, then shift.
(Ville).
Remove the gmbus frequency calculation = cdclk/1.01. Based on BIOS
programming, gmbus frequency = cdclk frequency. (Ville)
Add get_disp_clk_div, which can use to get cdclk/czclk divide.
v4: Fix the mmio_offset base for CZCLK_CDCLK_FREQ_RATIO, gmbus_freq
calculation, and duplicate check for gmbus_freq. (Ville)
In VLV, the spec is wrong about 4Mhz reference frequency for GMBUS. It
should be 1Mhz.
Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>
[danvet: Add the comment Ville suggested. Also appease checkpatch a
bit.]
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/xen/xen-acpi-pad.c')
0 files changed, 0 insertions, 0 deletions