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authorBen Skeggs <bskeggs@redhat.com>2011-11-09 20:22:25 +1000
committerBen Skeggs <bskeggs@redhat.com>2011-12-21 19:01:44 +1000
commitc8b9641a9146b13d34824f99c3d22c8c0c3a06bd (patch)
tree3b4280f3757ab9f9e82a4feaaec0336b38040a03 /drivers
parenteeb7a50bddb281d7beecb0ad73c9f1233e9932c2 (diff)
drm/nouveau/hwsq: remove some magic, give proper opcode names
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_hwsq.h21
-rw-r--r--drivers/gpu/drm/nouveau/nv50_pm.c8
2 files changed, 23 insertions, 6 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_hwsq.h b/drivers/gpu/drm/nouveau/nouveau_hwsq.h
index d59a3b3ff64..697687593a8 100644
--- a/drivers/gpu/drm/nouveau/nouveau_hwsq.h
+++ b/drivers/gpu/drm/nouveau/nouveau_hwsq.h
@@ -57,9 +57,26 @@ hwsq_fini(struct hwsq_ucode *hwsq)
}
static inline void
-hwsq_unkn(struct hwsq_ucode *hwsq, u8 v0)
+hwsq_usec(struct hwsq_ucode *hwsq, u8 usec)
{
- *hwsq->ptr.u08++ = v0;
+ u32 shift = 0;
+ while (usec & ~3) {
+ usec >>= 2;
+ shift++;
+ }
+
+ *hwsq->ptr.u08++ = (shift << 2) | usec;
+}
+
+static inline void
+hwsq_setf(struct hwsq_ucode *hwsq, u8 flag, int val)
+{
+ flag += 0x80;
+ if (val >= 0)
+ flag += 0x20;
+ if (val >= 1)
+ flag += 0x20;
+ *hwsq->ptr.u08++ = flag;
}
static inline void
diff --git a/drivers/gpu/drm/nouveau/nv50_pm.c b/drivers/gpu/drm/nouveau/nv50_pm.c
index 22789db4896..fce1214c3db 100644
--- a/drivers/gpu/drm/nouveau/nv50_pm.c
+++ b/drivers/gpu/drm/nouveau/nv50_pm.c
@@ -459,7 +459,7 @@ calc_mclk(struct drm_device *dev, u32 freq, struct hwsq_ucode *hwsq)
}
if (dev_priv->chipset >= 0x92)
hwsq_wr32(hwsq, 0x611200, 0x00003300); /* disable scanout */
- hwsq_unkn(hwsq, 0xb0); /* disable bus access */
+ hwsq_setf(hwsq, 0x10, 0); /* disable bus access */
hwsq_op5f(hwsq, 0x00, 0x01); /* no idea :s */
/* prepare memory controller */
@@ -478,10 +478,10 @@ calc_mclk(struct drm_device *dev, u32 freq, struct hwsq_ucode *hwsq)
hwsq_wr32(hwsq, 0x1002d4, 0x00000001); /* precharge banks and idle */
hwsq_wr32(hwsq, 0x1002dc, 0x00000000); /* stop self refresh mode */
hwsq_wr32(hwsq, 0x100210, 0x80000000); /* restart automatic refresh */
- hwsq_unkn(hwsq, 0x07); /* wait for the PLL to stabilize (12us) */
+ hwsq_usec(hwsq, 12); /* wait for the PLL to stabilize */
- hwsq_unkn(hwsq, 0x0b); /* may be unnecessary: causes flickering */
- hwsq_unkn(hwsq, 0xd0); /* enable bus access again */
+ hwsq_usec(hwsq, 48); /* may be unnecessary: causes flickering */
+ hwsq_setf(hwsq, 0x10, 1); /* enable bus access */
hwsq_op5f(hwsq, 0x00, 0x00); /* no idea, reverse of 0x00, 0x01? */
if (dev_priv->chipset >= 0x92)
hwsq_wr32(hwsq, 0x611200, 0x00003330); /* enable scanout */