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authorDaniel Vetter <daniel.vetter@ffwll.ch>2013-07-04 23:35:27 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-07-11 14:36:34 +0200
commit2adbee62e00d869a30cb93ea2269e5ea26a9bbc4 (patch)
treea58ecc9d6d040bb8e29b2cbc7fea1e7ae757347c /drivers
parent41a05a3a5cdc5d731014588b9a24759af1804d48 (diff)
drm/i915: queue work outside spinlock in hsw_pm_irq_handler
And kill the comment about it. Queueing work is a barrier type event, no amount of locking will help in ordering things (as long as we queue the work after having updated all relevant data structures). Also, the queue_work works itself as a sufficient memory barrier. Again on the surface this is just a tiny micro-optimization to reduce the hold-time of dev_priv->irq_lock. But the better reason is that it reduces superficial locking and so makes it clearer what we actually need for correctness. Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index d4af1154128..04861995fe1 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -969,9 +969,9 @@ static void hsw_pm_irq_handler(struct drm_i915_private *dev_priv,
I915_WRITE(GEN6_PMIMR, dev_priv->rps.pm_iir);
/* never want to mask useful interrupts. (also posting read) */
WARN_ON(I915_READ_NOTRACE(GEN6_PMIMR) & ~GEN6_PM_RPS_EVENTS);
- /* TODO: if queue_work is slow, move it out of the spinlock */
- queue_work(dev_priv->wq, &dev_priv->rps.work);
spin_unlock(&dev_priv->rps.lock);
+
+ queue_work(dev_priv->wq, &dev_priv->rps.work);
}
if (pm_iir & PM_VEBOX_USER_INTERRUPT)