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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-11-04 12:24:47 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-11-11 23:51:42 +0100
commitb3fcabb15bb83202fb5e4e5b296711b91c4942a3 (patch)
treeaaa861d226501f51673d513ce04d2d6a7d8cd31d /drivers
parent1abd02e2dd7e0bd577000301fb2fd47780637387 (diff)
drm/i915: drop the double-OP_STOREDW usage in blt_ring_flush
This has been introduced in "drm/i915: TLB invalidation with MI_FLUSH_DW requires a post-sync op". Reported-by: Fengguang Wu <fengguang.wu@intel.com> Reported-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index f7617a4e005..a035ac223fb 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1475,7 +1475,7 @@ static int blt_ring_flush(struct intel_ring_buffer *ring,
*/
if (invalidate & I915_GEM_DOMAIN_RENDER)
cmd |= MI_INVALIDATE_TLB | MI_FLUSH_DW_STORE_INDEX |
- MI_FLUSH_DW_OP_STOREDW | MI_FLUSH_DW_OP_STOREDW;
+ MI_FLUSH_DW_OP_STOREDW;
intel_ring_emit(ring, cmd);
intel_ring_emit(ring, I915_GEM_HWS_SCRATCH_ADDR | MI_FLUSH_DW_USE_GTT);
intel_ring_emit(ring, 0);