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authorDavid Woodhouse <David.Woodhouse@intel.com>2010-10-26 11:42:51 +0100
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-10-26 11:42:51 +0100
commit6411bf6cdfe9b444bc3aa0c23f8cf35460d69432 (patch)
tree0216003d2a1b3c67dd4352957e1cd5481d31bc02 /drivers
parent08968041bef437ec363623cd3218c2b083537ada (diff)
Revert "mtd: cleanup Kconfig dependencies"
This reverts commit 432dc821c90114f9b0e00f6752a700e937516ade. The individual CFI geometry options were carefully set up to get sane default values if the CFI_ADV_OPTIONS wasn't set, and it wasn't appropriate to move them into an if/endif block. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mtd/chips/Kconfig46
1 files changed, 24 insertions, 22 deletions
diff --git a/drivers/mtd/chips/Kconfig b/drivers/mtd/chips/Kconfig
index baac3533917..35c6a23b183 100644
--- a/drivers/mtd/chips/Kconfig
+++ b/drivers/mtd/chips/Kconfig
@@ -1,4 +1,5 @@
menu "RAM/ROM/Flash chip drivers"
+ depends on MTD!=n
config MTD_CFI
tristate "Detect flash chips by Common Flash Interface (CFI) probe"
@@ -26,10 +27,9 @@ config MTD_JEDECPROBE
config MTD_GEN_PROBE
tristate
-if MTD_GEN_PROBE
-
config MTD_CFI_ADV_OPTIONS
bool "Flash chip driver advanced configuration options"
+ depends on MTD_GEN_PROBE
help
If you need to specify a specific endianness for access to flash
chips, or if you wish to reduce the size of the kernel by including
@@ -39,10 +39,9 @@ config MTD_CFI_ADV_OPTIONS
If unsure, say 'N'.
-if MTD_CFI_ADV_OPTIONS
-
choice
prompt "Flash cmd/query data swapping"
+ depends on MTD_CFI_ADV_OPTIONS
default MTD_CFI_NOSWAP
config MTD_CFI_NOSWAP
@@ -73,6 +72,7 @@ endchoice
config MTD_CFI_GEOMETRY
bool "Specific CFI Flash geometry selection"
+ depends on MTD_CFI_ADV_OPTIONS
help
This option does not affect the code directly, but will enable
some other configuration options which would allow you to reduce
@@ -80,78 +80,81 @@ config MTD_CFI_GEOMETRY
arrangements of CFI chips. If unsure, say 'N' and all options
which are supported by the current code will be enabled.
-if MTD_CFI_GEOMETRY
-
config MTD_MAP_BANK_WIDTH_1
- bool "Support 8-bit buswidth"
+ bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
default y
help
If you wish to support CFI devices on a physical bus which is
8 bits wide, say 'Y'.
config MTD_MAP_BANK_WIDTH_2
- bool "Support 16-bit buswidth"
+ bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
default y
help
If you wish to support CFI devices on a physical bus which is
16 bits wide, say 'Y'.
config MTD_MAP_BANK_WIDTH_4
- bool "Support 32-bit buswidth"
+ bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
default y
help
If you wish to support CFI devices on a physical bus which is
32 bits wide, say 'Y'.
config MTD_MAP_BANK_WIDTH_8
- bool "Support 64-bit buswidth"
+ bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY
+ default n
help
If you wish to support CFI devices on a physical bus which is
64 bits wide, say 'Y'.
config MTD_MAP_BANK_WIDTH_16
- bool "Support 128-bit buswidth"
+ bool "Support 128-bit buswidth" if MTD_CFI_GEOMETRY
+ default n
help
If you wish to support CFI devices on a physical bus which is
128 bits wide, say 'Y'.
config MTD_MAP_BANK_WIDTH_32
- bool "Support 256-bit buswidth"
+ bool "Support 256-bit buswidth" if MTD_CFI_GEOMETRY
+ default n
help
If you wish to support CFI devices on a physical bus which is
256 bits wide, say 'Y'.
config MTD_CFI_I1
- bool "Support 1-chip flash interleave"
+ bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY
default y
help
If your flash chips are not interleaved - i.e. you only have one
flash chip addressed by each bus cycle, then say 'Y'.
config MTD_CFI_I2
- bool "Support 2-chip flash interleave"
+ bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY
default y
help
If your flash chips are interleaved in pairs - i.e. you have two
flash chips addressed by each bus cycle, then say 'Y'.
config MTD_CFI_I4
- bool "Support 4-chip flash interleave"
+ bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY
+ default n
help
If your flash chips are interleaved in fours - i.e. you have four
flash chips addressed by each bus cycle, then say 'Y'.
config MTD_CFI_I8
- bool "Support 8-chip flash interleave"
+ bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY
+ default n
help
If your flash chips are interleaved in eights - i.e. you have eight
flash chips addressed by each bus cycle, then say 'Y'.
-endif # MTD_CFI_GEOMETRY
-
config MTD_OTP
bool "Protection Registers aka one-time programmable (OTP) bits"
+ depends on MTD_CFI_ADV_OPTIONS
select HAVE_MTD_OTP
+ default n
help
This enables support for reading, writing and locking so called
"Protection Registers" present on some flash chips.
@@ -173,10 +176,9 @@ config MTD_OTP
This feature should therefore be used with extreme care. Any mistake
in the programming of OTP bits will waste them.
-endif # MTD_CFI_ADV_OPTIONS
-
config MTD_CFI_INTELEXT
tristate "Support for Intel/Sharp flash chips"
+ depends on MTD_GEN_PROBE
select MTD_CFI_UTIL
help
The Common Flash Interface defines a number of different command
@@ -186,6 +188,7 @@ config MTD_CFI_INTELEXT
config MTD_CFI_AMDSTD
tristate "Support for AMD/Fujitsu/Spansion flash chips"
+ depends on MTD_GEN_PROBE
select MTD_CFI_UTIL
help
The Common Flash Interface defines a number of different command
@@ -195,14 +198,13 @@ config MTD_CFI_AMDSTD
config MTD_CFI_STAA
tristate "Support for ST (Advanced Architecture) flash chips"
+ depends on MTD_GEN_PROBE
select MTD_CFI_UTIL
help
The Common Flash Interface defines a number of different command
sets which a CFI-compliant chip may claim to implement. This code
provides support for one of those command sets.
-endif # MTD_GEN_PROBE
-
config MTD_CFI_UTIL
tristate