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authorHeiko Stübner <heiko@sntech.de>2014-07-03 01:57:30 +0200
committerMike Turquette <mturquette@linaro.org>2014-07-13 12:17:04 -0700
commit0c02cf2f1c2ffd75221b43bacb4f02a0e52e014b (patch)
treef077dfd8233e422d494a70b3ea9f41671faaa747 /drivers
parent3eb635f1ca2d25bd11a697f5bdb52ac3d08c240e (diff)
clk: composite: allow read-only clocks
This allows readl-only composite clocks by making mux_ops->set_parent and divider_ops->round_rate/set_rate optional. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-By: Max Schwarz <max.schwarz@online.de> Tested-By: Max Schwarz <max.schwarz@online.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/clk-composite.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index 9548bfcbd56..faf7c32fe35 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -207,7 +207,7 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
clk_composite_ops = &composite->ops;
if (mux_hw && mux_ops) {
- if (!mux_ops->get_parent || !mux_ops->set_parent) {
+ if (!mux_ops->get_parent) {
clk = ERR_PTR(-EINVAL);
goto err;
}
@@ -215,7 +215,8 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
composite->mux_hw = mux_hw;
composite->mux_ops = mux_ops;
clk_composite_ops->get_parent = clk_composite_get_parent;
- clk_composite_ops->set_parent = clk_composite_set_parent;
+ if (mux_ops->set_parent)
+ clk_composite_ops->set_parent = clk_composite_set_parent;
if (mux_ops->determine_rate)
clk_composite_ops->determine_rate = clk_composite_determine_rate;
}
@@ -232,10 +233,6 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
if (rate_ops->set_rate) {
clk_composite_ops->set_rate = clk_composite_set_rate;
}
- } else {
- WARN(rate_ops->set_rate,
- "%s: missing round_rate op is required\n",
- __func__);
}
composite->rate_hw = rate_hw;