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authorDaniel Ribeiro <drwyrm@gmail.com>2009-06-23 12:33:10 -0300
committerSamuel Ortiz <sameo@linux.intel.com>2009-09-17 09:46:46 +0200
commitecd78cbdb989fd593bf4fd69cdb572200e70a553 (patch)
treef09604e607e78fea4c42cb2a7ce10e3f627cf87e /drivers
parent9f7b07d6cc3ed14783c9427a5b2a69794eb2de64 (diff)
mfd: add set_ts_bits for pcap
Some TS controller bits are on the same register as the ADC control, save TS specific bits and export a set_ts_bits function so the TS driver can set it with the adc_mutex lock held. Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mfd/ezx-pcap.c22
1 files changed, 18 insertions, 4 deletions
diff --git a/drivers/mfd/ezx-pcap.c b/drivers/mfd/ezx-pcap.c
index de7e63706ab..c5122024f05 100644
--- a/drivers/mfd/ezx-pcap.c
+++ b/drivers/mfd/ezx-pcap.c
@@ -195,6 +195,19 @@ static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc)
}
/* ADC */
+void pcap_set_ts_bits(struct pcap_chip *pcap, u32 bits)
+{
+ u32 tmp;
+
+ mutex_lock(&pcap->adc_mutex);
+ ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
+ tmp &= ~(PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR);
+ tmp |= bits & (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR);
+ ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
+ mutex_unlock(&pcap->adc_mutex);
+}
+EXPORT_SYMBOL_GPL(pcap_set_ts_bits);
+
static void pcap_disable_adc(struct pcap_chip *pcap)
{
u32 tmp;
@@ -217,15 +230,16 @@ static void pcap_adc_trigger(struct pcap_chip *pcap)
mutex_unlock(&pcap->adc_mutex);
return;
}
- mutex_unlock(&pcap->adc_mutex);
-
- /* start conversion on requested bank */
- tmp = pcap->adc_queue[head]->flags | PCAP_ADC_ADEN;
+ /* start conversion on requested bank, save TS_M bits */
+ ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
+ tmp &= (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR);
+ tmp |= pcap->adc_queue[head]->flags | PCAP_ADC_ADEN;
if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1)
tmp |= PCAP_ADC_AD_SEL1;
ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
+ mutex_unlock(&pcap->adc_mutex);
ezx_pcap_write(pcap, PCAP_REG_ADR, PCAP_ADR_ASC);
}