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authorDong Aisheng <dong.aisheng@linaro.org>2012-07-06 17:09:23 +0800
committerLinus Walleij <linus.walleij@linaro.org>2012-07-14 22:32:10 +0200
commit4a5f7eff8b0b34354e5c63272835e5e2dfe1c933 (patch)
tree9524d7c94277d1f6a119092d66724459d5462c27 /drivers
parenta6e7360b22f2360d7640f99051415d49cebeb908 (diff)
pinctrl: pinctrl-imx6q: add missed mux function for USBOTG_ID
The original pin registers table is derived from u-boot mainline, but somehow it was found missing some mux functions for USBOTG_ID. We added it at the bottom by following the exist pin function ids, then it will not break the exist using of pin function id in dts file. Reported-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pinctrl/pinctrl-imx6q.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-imx6q.c b/drivers/pinctrl/pinctrl-imx6q.c
index 7737d4d71a3..e9bf71fbedc 100644
--- a/drivers/pinctrl/pinctrl-imx6q.c
+++ b/drivers/pinctrl/pinctrl-imx6q.c
@@ -1950,6 +1950,8 @@ static struct imx_pin_reg imx6q_pin_regs[] = {
IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 5, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__GPIO_1_12 */
IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 6, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__SJC_DONE */
IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 7, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3 */
+ IMX_PIN_REG(MX6Q_PAD_ENET_RX_ER, 0x04EC, 0x01D8, 0, 0x0000, 0), /* MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID */
+ IMX_PIN_REG(MX6Q_PAD_GPIO_1, 0x05F4, 0x0224, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID */
};
/* Pad names for the pinmux subsystem */