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authorNate Case <ncase@xes-inc.com>2009-06-10 15:37:28 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-06-15 21:45:30 -0500
commitcab888e678d0986ebce95464d3842a6aeca1e3d8 (patch)
treee6ead4aac68d3a1b694c1cfed56b4650a1ab8715 /firmware/e100
parentc7a7a5b9a27e28ce5f800ead9091ce68d37e8088 (diff)
powerpc/fsl-booke: Enable L1 cache on e500v1/e500v2/e500mc CPUs
Some boot loaders may not enable L1 instruction/data cache. Check if data and instruction caches are enabled, and enable them if needed. Signed-off-by: Nate Case <ncase@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'firmware/e100')
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