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authorSylwester Nawrocki <s.nawrocki@samsung.com>2013-07-25 23:07:05 +0200
committerMike Turquette <mturquette@linaro.org>2013-08-13 10:01:56 -0700
commita701fe3851d9c7f6bd27bc0b92ca1668a42c8406 (patch)
tree60be6b273f79e63f27e3b4a5c6b1788ff54cd55d /fs/nfs/nfs4proc.c
parent765b7d4c4cb376465f81d0dd44b50861514dbcba (diff)
clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocks
The ISP clock registers belong to the ISP power domain and may change their values if this power domain is switched off/on. Add CLK_GET_RATE_NOCACHE flags to ensure we do not rely on invalid cached data when setting or getting frequency of those clocks. Without this fix the FIMC-IS Cortex-A5 core and AXI bus clocks have incorrect frequencies, which breaks the ISP operation and starting the video pipeline fails with timeouts reported by the FIMC-IS firmware. See related commit 722a860ecb29aa34ec6f7d7f32b949209e8 "[media] exynos4-is: Fix FIMC-IS clocks initialization" for more details. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'fs/nfs/nfs4proc.c')
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