diff options
| author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-01-30 08:29:05 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-01-30 08:29:05 -0800 |
| commit | c9cc8e771cb62e495765793e4b7d06016ae1b525 (patch) | |
| tree | 42c3ae364cd8b22e3263403f0baa2b5e8070b5da /include/asm-arm/arch-at91rm9200/at91rm9200.h | |
| parent | 59df3230fc57fa8900bebf3d2d68221d549f3c7c (diff) | |
| parent | b9d1902cd281d9b829fb3d6ee9148d28c8c63382 (diff) | |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 4117/1: S3C2412: Fix writel() usage in selection code
[ARM] 4111/1: Allow VFP to work with thread migration on SMP
[ARM] 4112/1: Only ioremap to supersections if DOMAIN_IO is zero
[ARM] 4106/1: S3C2410: typo fixes in register definitions
[ARM] 4102/1: Allow for PHYS_OFFSET on any valid 2MiB address
[ARM] Fix AMBA serial drivers for non-first serial ports
[ARM] 4100/1: iop3xx: fix cpu mask for iop333
[ARM] Update mach-types
[ARM] Fix show_mem() for discontigmem
[ARM] 4096/1: S3C24XX: change return code form s3c2410_gpio_getcfg()
[ARM] 4095/1: S3C24XX: Fix GPIO set for Bank A
[ARM] 4092/1: i.MX/MX1 CPU Frequency scaling latency definition
[ARM] 4089/1: AT91: GPIO wake IRQ cleanup
[ARM] 4088/1: AT91: Unbalanced IRQ in serial driver suspend/resume
[ARM] 4087/1: AT91: CPU reset for SAM9x processors
[ARM] 4086/1: AT91: Whitespace cleanup
[ARM] 4085/1: AT91: Header fixes.
[ARM] 4084/1: Remove CONFIG_DEBUG_WAITQ
Diffstat (limited to 'include/asm-arm/arch-at91rm9200/at91rm9200.h')
| -rw-r--r-- | include/asm-arm/arch-at91rm9200/at91rm9200.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200.h b/include/asm-arm/arch-at91rm9200/at91rm9200.h index 4d51177efdd..c569b6a21a4 100644 --- a/include/asm-arm/arch-at91rm9200/at91rm9200.h +++ b/include/asm-arm/arch-at91rm9200/at91rm9200.h @@ -274,7 +274,7 @@ #define AT91_PD19_TPK7 (1 << 19) /* B: ETM Trace Packet Port 7 */ #define AT91_PD20_NPCS3 (1 << 20) /* A: SPI Peripheral Chip Select 3 */ #define AT91_PD20_TPK8 (1 << 20) /* B: ETM Trace Packet Port 8 */ -#define AT91_PD21_RTS0 (1 << 21) /* A: USART Ready To Send 0 */ +#define AT91_PD21_RTS0 (1 << 21) /* A: USART Ready To Send 0 */ #define AT91_PD21_TPK9 (1 << 21) /* B: ETM Trace Packet Port 9 */ #define AT91_PD22_RTS1 (1 << 22) /* A: USART Ready To Send 1 */ #define AT91_PD22_TPK10 (1 << 22) /* B: ETM Trace Packet Port 10 */ |