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authorLinus Torvalds <torvalds@woody.osdl.org>2006-12-07 15:40:39 -0800
committerLinus Torvalds <torvalds@woody.osdl.org>2006-12-07 15:40:39 -0800
commitea14fad0d416354a4e9bb1a04f32acba706f9548 (patch)
tree2c8acc5331f189aef1d40ddce3f40d6be9314e77 /include/asm-arm/arch-at91rm9200/at91rm9200_udp.h
parent6ee7e78e7c78d871409ad4df30551c9355be7d0e (diff)
parent6705cda24fad1cb0ac82ac4f312df8ec735b39b0 (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (76 commits) [ARM] 4002/1: S3C24XX: leave parent IRQs unmasked [ARM] 4001/1: S3C24XX: shorten reboot time [ARM] 3983/2: remove unused argument to __bug() [ARM] 4000/1: Osiris: add third serial port in [ARM] 3999/1: RX3715: suspend to RAM support [ARM] 3998/1: VR1000: LED platform devices [ARM] 3995/1: iop13xx: add iop13xx support [ARM] 3968/1: iop13xx: add iop13xx_defconfig [ARM] Update mach-types [ARM] Allow gcc to optimise arm_add_memory a little more [ARM] 3991/1: i.MX/MX1 high resolution time source [ARM] 3990/1: i.MX/MX1 more precise PLL decode [ARM] 3986/1: H1940: suspend to RAM support [ARM] 3985/1: ixp4xx clocksource cleanup [ARM] 3984/1: ixp4xx/nslu2: Fix disk LED numbering (take 2) [ARM] 3994/1: ixp23xx: fix handling of pci master aborts [ARM] 3981/1: sched_clock for PXA2xx [ARM] 3980/1: extend the ARM Versatile sched_clock implementation from 32 to 63 bit [ARM] 3979/1: extend the SA11x0 sched_clock implementation from 32 to 63 bit period [ARM] 3978/1: macro to provide a 63-bit value from a 32-bit hardware counter ...
Diffstat (limited to 'include/asm-arm/arch-at91rm9200/at91rm9200_udp.h')
-rw-r--r--include/asm-arm/arch-at91rm9200/at91rm9200_udp.h77
1 files changed, 0 insertions, 77 deletions
diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_udp.h b/include/asm-arm/arch-at91rm9200/at91rm9200_udp.h
deleted file mode 100644
index 951e3f61cef..00000000000
--- a/include/asm-arm/arch-at91rm9200/at91rm9200_udp.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * include/asm-arm/arch-at91rm9200/at91rm9200_udp.h
- *
- * Copyright (C) 2005 Ivan Kokshaysky
- * Copyright (C) SAN People
- *
- * USB Device Port (UDP) registers.
- * Based on AT91RM9200 datasheet revision E.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91RM9200_UDP_H
-#define AT91RM9200_UDP_H
-
-#define AT91_UDP_FRM_NUM 0x00 /* Frame Number Register */
-#define AT91_UDP_NUM (0x7ff << 0) /* Frame Number */
-#define AT91_UDP_FRM_ERR (1 << 16) /* Frame Error */
-#define AT91_UDP_FRM_OK (1 << 17) /* Frame OK */
-
-#define AT91_UDP_GLB_STAT 0x04 /* Global State Register */
-#define AT91_UDP_FADDEN (1 << 0) /* Function Address Enable */
-#define AT91_UDP_CONFG (1 << 1) /* Configured */
-#define AT91_UDP_ESR (1 << 2) /* Enable Send Resume */
-#define AT91_UDP_RSMINPR (1 << 3) /* Resume has been sent */
-#define AT91_UDP_RMWUPE (1 << 4) /* Remote Wake Up Enable */
-
-#define AT91_UDP_FADDR 0x08 /* Function Address Register */
-#define AT91_UDP_FADD (0x7f << 0) /* Function Address Value */
-#define AT91_UDP_FEN (1 << 8) /* Function Enable */
-
-#define AT91_UDP_IER 0x10 /* Interrupt Enable Register */
-#define AT91_UDP_IDR 0x14 /* Interrupt Disable Register */
-#define AT91_UDP_IMR 0x18 /* Interrupt Mask Register */
-
-#define AT91_UDP_ISR 0x1c /* Interrupt Status Register */
-#define AT91_UDP_EP(n) (1 << (n)) /* Endpoint Interrupt Status */
-#define AT91_UDP_RXSUSP (1 << 8) /* USB Suspend Interrupt Status */
-#define AT91_UDP_RXRSM (1 << 9) /* USB Resume Interrupt Status */
-#define AT91_UDP_EXTRSM (1 << 10) /* External Resume Interrupt Status */
-#define AT91_UDP_SOFINT (1 << 11) /* Start of Frame Interrupt Status */
-#define AT91_UDP_ENDBUSRES (1 << 12) /* End of Bus Reset Interrpt Status */
-#define AT91_UDP_WAKEUP (1 << 13) /* USB Wakeup Interrupt Status */
-
-#define AT91_UDP_ICR 0x20 /* Interrupt Clear Register */
-#define AT91_UDP_RST_EP 0x28 /* Reset Endpoint Register */
-
-#define AT91_UDP_CSR(n) (0x30 + ((n) * 4)) /* Endpoint Control/Status Registers 0-7 */
-#define AT91_UDP_TXCOMP (1 << 0) /* Generates IN packet with data previously written in DPR */
-#define AT91_UDP_RX_DATA_BK0 (1 << 1) /* Receive Data Bank 0 */
-#define AT91_UDP_RXSETUP (1 << 2) /* Send STALL to the host */
-#define AT91_UDP_STALLSENT (1 << 3) /* Stall Sent / Isochronous error (Isochronous endpoints) */
-#define AT91_UDP_TXPKTRDY (1 << 4) /* Transmit Packet Ready */
-#define AT91_UDP_FORCESTALL (1 << 5) /* Force Stall */
-#define AT91_UDP_RX_DATA_BK1 (1 << 6) /* Receive Data Bank 1 */
-#define AT91_UDP_DIR (1 << 7) /* Transfer Direction */
-#define AT91_UDP_EPTYPE (7 << 8) /* Endpoint Type */
-#define AT91_UDP_EPTYPE_CTRL (0 << 8)
-#define AT91_UDP_EPTYPE_ISO_OUT (1 << 8)
-#define AT91_UDP_EPTYPE_BULK_OUT (2 << 8)
-#define AT91_UDP_EPTYPE_INT_OUT (3 << 8)
-#define AT91_UDP_EPTYPE_ISO_IN (5 << 8)
-#define AT91_UDP_EPTYPE_BULK_IN (6 << 8)
-#define AT91_UDP_EPTYPE_INT_IN (7 << 8)
-#define AT91_UDP_DTGLE (1 << 11) /* Data Toggle */
-#define AT91_UDP_EPEDS (1 << 15) /* Endpoint Enable/Disable */
-#define AT91_UDP_RXBYTECNT (0x7ff << 16) /* Number of bytes in FIFO */
-
-#define AT91_UDP_FDR(n) (0x50 + ((n) * 4)) /* Endpoint FIFO Data Registers 0-7 */
-
-#define AT91_UDP_TXVC 0x74 /* Transceiver Control Register */
-#define AT91_UDP_TXVC_TXVDIS (1 << 8) /* Transceiver Disable */
-
-#endif