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authorJon Ringle <jon.ringle@comdial.com>2005-10-28 16:19:37 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-10-28 16:19:37 +0100
commit0b83f1400fa6e5f0d4afcff033628a16c163862a (patch)
treec6fa01fd5a8d156b415ba9203f8ad349165de8ec /include/asm-arm/arch-clps711x
parentb57235215933d5fde4013e2448223b934b4ac2b7 (diff)
[ARM] 2918/1: [update] Base port of Comdial MP1000 platfrom
Patch from Jon Ringle Updated 2898/1 per comments: - Removed fixup - Moved code in mach-mp1000/ to mach-clps711x/ - Cleaned up code in mp1000-seprom.c. Eliminated code that displayed the contents of the eeprom Please comment. Signed-off-by: Jon Ringle Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-clps711x')
-rw-r--r--include/asm-arm/arch-clps711x/hardware.h117
-rw-r--r--include/asm-arm/arch-clps711x/mp1000-seprom.h77
2 files changed, 194 insertions, 0 deletions
diff --git a/include/asm-arm/arch-clps711x/hardware.h b/include/asm-arm/arch-clps711x/hardware.h
index 1386871e1a5..f864c367c93 100644
--- a/include/asm-arm/arch-clps711x/hardware.h
+++ b/include/asm-arm/arch-clps711x/hardware.h
@@ -235,4 +235,121 @@
#define CEIVA_PB0_BLK_BTN (1<<0)
#endif // #if defined (CONFIG_ARCH_CEIVA)
+#if defined (CONFIG_MACH_MP1000)
+/* NOR FLASH */
+#define MP1000_NIO_BASE 0xf9000000 /* virtual */
+#define MP1000_NIO_START CS0_PHYS_BASE /* physical */
+#define MP1000_NIO_SIZE 0x00400000
+
+/* DSP Interface */
+#define MP1000_DSP_BASE 0xfa000000 /* virtual */
+#define MP1000_DSP_START CS1_PHYS_BASE /* physical */
+#define MP1000_DSP_SIZE 0x00100000
+
+/* LCD, DAA/DSP, RTC, DAA RW Reg all in CS2 */
+#define MP1000_LIO_BASE 0xfb000000 /* virtual */
+#define MP1000_LIO_START CS2_PHYS_BASE /* physical */
+#define MP1000_LIO_SIZE 0x00100000
+
+/* NAND FLASH */
+#define MP1000_FIO_BASE 0xfc000000 /* virtual */
+#define MP1000_FIO_START CS3_PHYS_BASE /* physical */
+#define MP1000_FIO_SIZE 0x00800000
+
+/* Ethernet */
+#define MP1000_EIO_BASE 0xfd000000 /* virtual */
+#define MP1000_EIO_START CS4_PHYS_BASE /* physical */
+#define MP1000_EIO_SIZE 0x00100000
+
+#define MP1000_LCD_OFFSET 0x00000000 /* LCD offset in CS2 */
+#define MP1000_DDD_OFFSET 0x00001000 /* DAA/DAI/DSP sft reset offst*/
+#define MP1000_RTC_OFFSET 0x00002000 /* RTC offset in CS2 */
+#define MP1000_DAA_OFFSET 0x00003000 /* DAA RW reg offset in CS2 */
+
+/* IDE */
+#define MP1000_IDE_BASE 0xfe000000 /* virtual */
+#define MP1000_IDE_START CS5_PHYS_BASE /* physical */
+#define MP1000_IDE_SIZE 0x00100000 /* actually it's only 0x1000 */
+
+#define IRQ_HARDDISK IRQ_EINT2
+
+/*
+ * IDE registers definition
+ */
+
+#define IDE_CONTROL_BASE (MP1000_IDE_BASE + 0x1000)
+#define IDE_BASE_OFF (MP1000_IDE_BASE)
+
+#define IDE_WRITE_DEVICE_DATA (IDE_BASE_OFF + 0x0)
+#define IDE_FEATURES_REGISTER (IDE_BASE_OFF + 0x2)
+#define IDE_SECTOR_COUNT_REGISTER (IDE_BASE_OFF + 0x4)
+#define IDE_SECTOR_NUMBER_REGISTER (IDE_BASE_OFF + 0x6)
+#define IDE_CYLINDER_LOW_REGISTER (IDE_BASE_OFF + 0x8)
+#define IDE_CYLINDER_HIGH_REGISTER (IDE_BASE_OFF + 0xa)
+#define IDE_DEVICE_HEAD_REGISTER (IDE_BASE_OFF + 0xc)
+#define IDE_COMMAND_DATA_REGISTER (IDE_BASE_OFF + 0xe)
+#define IDE_DEVICE_CONTROL_REGISTER (IDE_CONTROL_BASE + 0xc)
+
+#define IDE_IRQ IRQ_EINT2
+
+
+#define RTC_PORT(x) (MP1000_LIO_BASE+0x2000 + (x*2))
+#define RTC_ALWAYS_BCD 0
+
+/*
+// Definitions of the bit fields in the HwPortA register for the
+// MP1000 board.
+*/
+#define HwPortAKeyboardRow1 0x00000001
+#define HwPortAKeyboardRow2 0x00000002
+#define HwPortAKeyboardRow3 0x00000004
+#define HwPortAKeyboardRow4 0x00000008
+#define HwPortAKeyboardRow5 0x00000010
+#define HwPortAKeyboardRow6 0x00000020
+#define HwPortALCDEnable 0x00000040
+#define HwPortAOffhook 0x00000080
+
+/*
+// Definitions of the bit fields in the HwPortB register for the
+// MP1000 board.
+*/
+#define HwPortBL3Mode 0x00000001
+#define HwPortBL3Clk 0x00000002
+#define HwPortBSClk 0x00000001
+#define HwPortBSData 0x00000002
+#define HwPortBL3Data 0x00000004
+#define HwPortBMute 0x00000008
+#define HwPortBQD0 0x00000010
+#define HwPortBQD1 0x00000020
+#define HwPortBQD2 0x00000040
+#define HwPortBQD3 0x00000080
+
+/*
+// Definitions of the bit fields in the HwPortD register for the
+// MP1000 board.
+*/
+#define HwPortDLED1 0x00000001
+#define HwPortDLED2 0x00000002
+#define HwPortDLED3 0x00000004
+#define HwPortDLED4 0x00000008
+#define HwPortDLED5 0x00000010
+#define HwPortDEECS 0x00000020
+#define HwPortBRTS 0x00000040
+#define HwPortBRI 0x00000080
+
+
+/*
+// Definitions of the bit fields in the HwPortE register for the
+// MP1000 board.
+*/
+
+#define HwPortECLE 0x00000001
+#define HwPortESepromDOut 0x00000001
+#define HwPortEALE 0x00000002
+#define HwPortESepromDIn 0x00000002
+#define HwPortENANDCS 0x00000004
+#define HwPortESepromCLK 0x00000004
+
+#endif // #if defined (CONFIG_MACH_MP1000)
+
#endif
diff --git a/include/asm-arm/arch-clps711x/mp1000-seprom.h b/include/asm-arm/arch-clps711x/mp1000-seprom.h
new file mode 100644
index 00000000000..3e5566cf966
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/mp1000-seprom.h
@@ -0,0 +1,77 @@
+#ifndef MP1000_SEPROM_H
+#define MP1000_SEPROM_H
+
+/*
+ * mp1000-seprom.h
+ *
+ *
+ * This file contains the Serial EEPROM definitions for the MP1000 board
+ *
+ * Copyright (C) 2005 Comdial Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#define COMMAND_ERASE (0x1C0)
+#define COMMAND_ERASE_ALL (0x120)
+#define COMMAND_WRITE_DISABLE (0x100)
+#define COMMAND_WRITE_ENABLE (0x130)
+#define COMMAND_READ (0x180)
+#define COMMAND_WRITE (0x140)
+#define COMMAND_WRITE_ALL (0x110)
+
+//
+// Serial EEPROM data format
+//
+
+#define PACKED __attribute__ ((packed))
+
+typedef struct _EEPROM {
+ union {
+ unsigned char eprom_byte_data[128];
+ unsigned short eprom_short_data[64];
+ struct {
+ unsigned char version PACKED; // EEPROM Version "1" for now
+ unsigned char box_id PACKED; // Box ID (Standalone, SOHO, embedded, etc)
+ unsigned char major_hw_version PACKED; // Major Hardware version (Hex)
+ unsigned char minor_hw_version PACKED; // Minor Hardware Version (Hex)
+ unsigned char mfg_id[3] PACKED; // Manufacturer ID (3 character Alphabetic)
+ unsigned char mfg_serial_number[10] PACKED; // Manufacturer Serial number
+ unsigned char mfg_date[3] PACKED; // Date of Mfg (Formatted YY:MM:DD)
+ unsigned char country PACKED; // Country of deployment
+ unsigned char mac_Address[6] PACKED; // MAC Address
+ unsigned char oem_string[20] PACKED; // OEM ID string
+ unsigned short feature_bits1 PACKED; // Feature Bits 1
+ unsigned short feature_bits2 PACKED; // Feature Bits 2
+ unsigned char filler[75] PACKED; // Unused/Undefined “0” initialized
+ unsigned short checksum PACKED; // byte accumulated short checksum
+ } eprom_struct;
+ } variant;
+} eeprom_struct;
+
+/* These settings must be mutually exclusive */
+#define FEATURE_BITS1_DRAMSIZE_16MEG 0x0001 /* 0 signifies 4 MEG system */
+#define FEATURE_BITS1_DRAMSIZE_8MEG 0x0002 /* 1 in bit 1 = 8MEG system */
+#define FEATURE_BITS1_DRAMSIZE_64MEG 0x0004 /* 1 in bit 2 = 64MEG system */
+
+#define FEATURE_BITS1_CPUIS90MEG 0x0010
+
+extern void seprom_init(void);
+extern eeprom_struct* get_seprom_ptr(void);
+extern unsigned char* get_eeprom_mac_address(void);
+
+#endif /* MP1000_SEPROM_H */
+