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| author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-28 14:40:39 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-28 14:40:39 -0700 |
| commit | ebdea46fecae40c4d7effcd33f40918a37a1df4b (patch) | |
| tree | e4312bf7f1f3d184738963a0ec300aa9fdfd55c1 /include/asm-arm/arch-iop32x/iq80321.h | |
| parent | fecf3404f4aba6d0edeba31eeb018cbb6326dff2 (diff) | |
| parent | 250d375d1da45a5e08ab8baf5eaa7eb258afd82b (diff) | |
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (130 commits)
[ARM] 3856/1: Add clocksource for Intel IXP4xx platforms
[ARM] 3855/1: Add generic time support
[ARM] 3873/1: S3C24XX: Add irq_chip names
[ARM] 3872/1: S3C24XX: Apply consistant tabbing to irq_chips
[ARM] 3871/1: S3C24XX: Fix ordering of EINT4..23
[ARM] nommu: confirms the CR_V bit in nommu mode
[ARM] nommu: abort handler fixup for !CPU_CP15_MMU cores.
[ARM] 3870/1: AT91: Start removing static memory mappings
[ARM] 3869/1: AT91: NAND support for DK and KB9202 boards
[ARM] 3868/1: AT91 hardware header update
[ARM] 3867/1: AT91 GPIO update
[ARM] 3866/1: AT91 clock update
[ARM] 3865/1: AT91RM9200 header updates
[ARM] 3862/2: S3C2410 - add basic power management support for AML M5900 series
[ARM] kthread: switch arch/arm/kernel/apm.c
[ARM] Off-by-one in arch/arm/common/icst*
[ARM] 3864/1: Refactore sharpsl_pm
[ARM] 3863/1: Add Locomo SPI Device
[ARM] 3847/2: Convert LOMOMO to use struct device for GPIOs
[ARM] Use CPU_CACHE_* where possible in asm/cacheflush.h
...
Diffstat (limited to 'include/asm-arm/arch-iop32x/iq80321.h')
| -rw-r--r-- | include/asm-arm/arch-iop32x/iq80321.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/include/asm-arm/arch-iop32x/iq80321.h b/include/asm-arm/arch-iop32x/iq80321.h new file mode 100644 index 00000000000..eb69db9b9a0 --- /dev/null +++ b/include/asm-arm/arch-iop32x/iq80321.h @@ -0,0 +1,17 @@ +/* + * include/asm-arm/arch-iop32x/iq80321.h + * + * Intel IQ80321 evaluation board registers + */ + +#ifndef __IQ80321_H +#define __IQ80321_H + +#define IQ80321_UART 0xfe800000 /* UART #1 */ +#define IQ80321_7SEG_1 0xfe840000 /* 7-Segment MSB */ +#define IQ80321_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */ +#define IQ80321_ROTARY_SW 0xfe8d0000 /* Rotary Switch */ +#define IQ80321_BATT_STAT 0xfe8f0000 /* Battery Status */ + + +#endif |