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authorLennert Buytenhek <buytenh@wantstofly.org>2006-06-20 19:26:41 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-06-20 19:26:41 +0100
commite6fea6a5e30efef56dee2b8455fde0811922055b (patch)
tree10018ebe35f826ae722aae9e196280516a56ff8b /include/asm-arm/arch-ixp23xx
parent5af29e56c221d709bdbd5fccaf190e21f290a30e (diff)
[ARM] 3602/1: ixp23xx: fix two typos
Patch from Lennert Buytenhek Fix two typos in include/asm-arm/arch-ixp23xx. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-ixp23xx')
-rw-r--r--include/asm-arm/arch-ixp23xx/entry-macro.S2
-rw-r--r--include/asm-arm/arch-ixp23xx/ixp23xx.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-arm/arch-ixp23xx/entry-macro.S b/include/asm-arm/arch-ixp23xx/entry-macro.S
index 0ef4e6016ac..867761677b5 100644
--- a/include/asm-arm/arch-ixp23xx/entry-macro.S
+++ b/include/asm-arm/arch-ixp23xx/entry-macro.S
@@ -8,7 +8,7 @@
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET)
ldr \irqnr, [\irqnr] @ get interrupt number
- cmp \irqnr, #0x0 @ suprious interrupt ?
+ cmp \irqnr, #0x0 @ spurious interrupt ?
movne \irqnr, \irqnr, lsr #2 @ skip unwanted low order bits
subne \irqnr, \irqnr, #1 @ convert to 0 based
diff --git a/include/asm-arm/arch-ixp23xx/ixp23xx.h b/include/asm-arm/arch-ixp23xx/ixp23xx.h
index e49e1ca61b1..01efdbd1180 100644
--- a/include/asm-arm/arch-ixp23xx/ixp23xx.h
+++ b/include/asm-arm/arch-ixp23xx/ixp23xx.h
@@ -251,7 +251,7 @@
* CAP CSRs.
****************************************************************************/
#define IXP23XX_GLOBAL_REG(x) ((volatile unsigned long *)(IXP23XX_CAP_CSR_VIRT + 0x4a00 + (x)))
-#define IXP23XX_PROD_IDG IXP23XX_GLOBAL_REG(0x00)
+#define IXP23XX_PRODUCT_ID IXP23XX_GLOBAL_REG(0x00)
#define IXP23XX_MISC_CONTROL IXP23XX_GLOBAL_REG(0x04)
#define IXP23XX_MSF_CLK_CNTRL IXP23XX_GLOBAL_REG(0x08)
#define IXP23XX_RESET0 IXP23XX_GLOBAL_REG(0x0c)